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[RISCV] Use significant bits helpers in narrowing of build vectors [nfc] (#104511)
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llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -3813,16 +3813,14 @@ static SDValue lowerBuildVectorOfConstants(SDValue Op, SelectionDAG &DAG,
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// TODO: We really should be costing the smaller vector. There are
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// profitable cases this misses.
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if (EltBitSize > 8 && VT.isInteger() &&
3816-
(NumElts <= 4 || VT.getSizeInBits() > Subtarget.getRealMinVLen())) {
3817-
unsigned SignBits = DAG.ComputeNumSignBits(Op);
3818-
if (EltBitSize - SignBits < 8) {
3819-
SDValue Source = DAG.getBuildVector(VT.changeVectorElementType(MVT::i8),
3820-
DL, Op->ops());
3821-
Source = convertToScalableVector(ContainerVT.changeVectorElementType(MVT::i8),
3822-
Source, DAG, Subtarget);
3823-
SDValue Res = DAG.getNode(RISCVISD::VSEXT_VL, DL, ContainerVT, Source, Mask, VL);
3824-
return convertFromScalableVector(VT, Res, DAG, Subtarget);
3825-
}
3816+
(NumElts <= 4 || VT.getSizeInBits() > Subtarget.getRealMinVLen()) &&
3817+
DAG.ComputeMaxSignificantBits(Op) <= 8) {
3818+
SDValue Source = DAG.getBuildVector(VT.changeVectorElementType(MVT::i8),
3819+
DL, Op->ops());
3820+
Source = convertToScalableVector(ContainerVT.changeVectorElementType(MVT::i8),
3821+
Source, DAG, Subtarget);
3822+
SDValue Res = DAG.getNode(RISCVISD::VSEXT_VL, DL, ContainerVT, Source, Mask, VL);
3823+
return convertFromScalableVector(VT, Res, DAG, Subtarget);
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}
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if (SDValue Res = lowerBuildVectorViaDominantValues(Op, DAG, Subtarget))

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