[RISCV][test] Add tests for swapped operands

Author: pfusik

llvm/test/CodeGen/RISCV/rv32zbb.ll

@@ -1881,3 +1881,21 @@ define i32 @sub_if_uge_C_multiuse_sub_i32(i32 signext %x, ptr %z) {
   %cond = select i1 %cmp, i32 %sub, i32 %x
   ret i32 %cond
 }
+
+define i32 @sub_if_uge_C_swapped_i32(i32 %x) {
+; CHECK-LABEL: sub_if_uge_C_swapped_i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a1, 16
+; CHECK-NEXT:    lui a2, 1048560
+; CHECK-NEXT:    addi a1, a1, -15
+; CHECK-NEXT:    sltu a1, a0, a1
+; CHECK-NEXT:    addi a1, a1, -1
+; CHECK-NEXT:    addi a2, a2, 15
+; CHECK-NEXT:    and a1, a1, a2
+; CHECK-NEXT:    add a0, a0, a1
+; CHECK-NEXT:    ret
+  %cmp = icmp ult i32 %x, 65521
+  %sub = add i32 %x, -65521
+  %cond = select i1 %cmp, i32 %x, i32 %sub
+  ret i32 %cond
+}

llvm/test/CodeGen/RISCV/rv64zbb.ll

@@ -2046,3 +2046,21 @@ define i32 @sub_if_uge_C_multiuse_sub_i32(i32 signext %x, ptr %z) {
   %cond = select i1 %cmp, i32 %sub, i32 %x
   ret i32 %cond
 }
+
+define i32 @sub_if_uge_C_swapped_i32(i32 signext %x) {
+; CHECK-LABEL: sub_if_uge_C_swapped_i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a1, 16
+; CHECK-NEXT:    lui a2, 1048560
+; CHECK-NEXT:    addiw a1, a1, -15
+; CHECK-NEXT:    sltu a1, a0, a1
+; CHECK-NEXT:    addi a1, a1, -1
+; CHECK-NEXT:    addi a2, a2, 15
+; CHECK-NEXT:    and a1, a1, a2
+; CHECK-NEXT:    addw a0, a0, a1
+; CHECK-NEXT:    ret
+  %cmp = icmp ult i32 %x, 65521
+  %sub = add i32 %x, -65521
+  %cond = select i1 %cmp, i32 %x, i32 %sub
+  ret i32 %cond
+}