ValueTracking: simplify udiv/urem recurrences

udiv and urem recurrences have the property that the result can never
exceed the start value. Implement a simplification based on this
property.

Author: artagnon

llvm/lib/Analysis/ValueTracking.cpp

@@ -1543,6 +1543,29 @@ static void computeKnownBitsFromOperator(const Operator *I,
         }
         break;
       }
+
+      case Instruction::UDiv: {
+        // For UDiv, the result can never exceed either the numerator, or the
+        // start value, whichever is greater. The case where the PHI is not
+        // the numerator of the UDiv is already handled by other code.
+        if (BO->getOperand(0) != P)
+          break;
+        [[fallthrough]];
+      }
+
+      case Instruction::URem: {
+        // For URem, the result can never exceed the start value.
+        SimplifyQuery RecQ = Q.getWithoutCondContext();
+
+        unsigned OpNum = P->getOperand(0) == R ? 0 : 1;
+        Instruction *RInst = P->getIncomingBlock(OpNum)->getTerminator();
+
+        RecQ.CxtI = RInst;
+        computeKnownBits(R, DemandedElts, Known2, Depth + 1, RecQ);
+        Known.Zero.setHighBits(Known2.countMinLeadingZeros());
+        break;
+      }
+
       default:
         break;
       }
@@ -8997,12 +9020,14 @@ bool llvm::matchSimpleRecurrence(const PHINode *P, BinaryOperator *&BO,
     switch (Opcode) {
     default:
       continue;
-    // TODO: Expand list -- xor, div, gep, uaddo, etc..
+    // TODO: Expand list -- xor, gep, uadd.sat etc.
     case Instruction::LShr:
     case Instruction::AShr:
     case Instruction::Shl:
     case Instruction::Add:
     case Instruction::Sub:
+    case Instruction::UDiv:
+    case Instruction::URem:
     case Instruction::And:
     case Instruction::Or:
     case Instruction::Mul:

llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll

@@ -86,12 +86,9 @@ define i64 @test_udiv(i1 %c) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
-; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 9, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[IV_NEXT]] = udiv i64 [[IV]], 3
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[EXIT:%.*]], label [[LOOP]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[RES:%.*]] = and i64 [[IV]], 16
-; CHECK-NEXT:    ret i64 [[RES]]
+; CHECK-NEXT:    ret i64 0
 ;
 entry:
   br label %loop
@@ -132,12 +129,9 @@ define i64 @test_urem(i1 %c) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
-; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 3, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT:    [[IV_NEXT]] = urem i64 9, [[IV]]
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[EXIT:%.*]], label [[LOOP]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[RES:%.*]] = and i64 [[IV]], 4
-; CHECK-NEXT:    ret i64 [[RES]]
+; CHECK-NEXT:    ret i64 0
 ;
 entry:
   br label %loop