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[SelectionDAG] Switch to LiveRegUnits
1 parent 04bbbba commit 0580df9

22 files changed

+153
-198
lines changed

‎llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020
#include "llvm/ADT/SparseMultiSet.h"
2121
#include "llvm/ADT/SparseSet.h"
2222
#include "llvm/ADT/identity.h"
23-
#include "llvm/CodeGen/LivePhysRegs.h"
23+
#include "llvm/CodeGen/LiveRegUnits.h"
2424
#include "llvm/CodeGen/MachineBasicBlock.h"
2525
#include "llvm/CodeGen/ScheduleDAG.h"
2626
#include "llvm/CodeGen/TargetRegisterInfo.h"
@@ -263,7 +263,7 @@ namespace llvm {
263263
MachineInstr *FirstDbgValue = nullptr;
264264

265265
/// Set of live physical registers for updating kill flags.
266-
LivePhysRegs LiveRegs;
266+
LiveRegUnits LiveRegs;
267267

268268
public:
269269
explicit ScheduleDAGInstrs(MachineFunction &mf,

‎llvm/lib/CodeGen/ScheduleDAGInstrs.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1103,7 +1103,7 @@ void ScheduleDAGInstrs::reduceHugeMemNodeMaps(Value2SUsMap &stores,
11031103
dbgs() << "Loading SUnits:\n"; loads.dump());
11041104
}
11051105

1106-
static void toggleKills(const MachineRegisterInfo &MRI, LivePhysRegs &LiveRegs,
1106+
static void toggleKills(const MachineRegisterInfo &MRI, LiveRegUnits &LiveRegs,
11071107
MachineInstr &MI, bool addToLiveRegs) {
11081108
for (MachineOperand &MO : MI.operands()) {
11091109
if (!MO.isReg() || !MO.readsReg())
@@ -1113,7 +1113,7 @@ static void toggleKills(const MachineRegisterInfo &MRI, LivePhysRegs &LiveRegs,
11131113
continue;
11141114

11151115
// Things that are available after the instruction are killed by it.
1116-
bool IsKill = LiveRegs.available(MRI, Reg);
1116+
bool IsKill = LiveRegs.available(Reg);
11171117
MO.setIsKill(IsKill);
11181118
if (addToLiveRegs)
11191119
LiveRegs.addReg(Reg);
@@ -1144,7 +1144,7 @@ void ScheduleDAGInstrs::fixupKills(MachineBasicBlock &MBB) {
11441144
continue;
11451145
LiveRegs.removeReg(Reg);
11461146
} else if (MO.isRegMask()) {
1147-
LiveRegs.removeRegsInMask(MO);
1147+
LiveRegs.removeRegsNotPreserved(MO.getRegMask());
11481148
}
11491149
}
11501150

‎llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,5 @@
11
# RUN: llc -start-before=prologepilog -stop-after=livedebugvalues -mattr=+sve -o - %s | FileCheck %s
2-
#
3-
# FIXME: re-enable this run line when InstrRef LiveDebugValues is able to
4-
# rely on the target spill/restore inst recognisers.
5-
# run: llc -start-before=prologepilog -stop-after=livedebugvalues -experimental-debug-variable-locations -mattr=+sve -o - %s | FileCheck %s
2+
# RUN: llc -start-before=prologepilog -stop-after=livedebugvalues -experimental-debug-variable-locations -mattr=+sve -o - %s | FileCheck %s
63
#
74
# Test that the LiveDebugValues pass can correctly handle the address
85
# of the SVE spill (at a scalable address location) which is expressed
@@ -17,7 +14,7 @@
1714
# correctly recognize debug-value !27 is in $z1 after the following reload:
1815
#
1916
# CHECK: renamable $z1 = LD1W_IMM renamable $p0, $fp, -[[#OFFSET]], debug-location !34 :: (load unknown-size from %stack.0, align 16)
20-
# CHECK-DAG: ST1W_IMM killed renamable $z3, killed renamable $p0, $fp, -[[#OFFSET]] :: (store unknown-size into %stack.0, align 16)
17+
# CHECK-DAG: ST1W_IMM killed renamable $z3, killed renamable $p0, killed $fp, -[[#OFFSET]] :: (store unknown-size into %stack.0, align 16)
2118
# CHECK-DAG: DBG_VALUE $noreg, $noreg, !27, !DIExpression(), debug-location !30
2219

2320
--- |

‎llvm/test/CodeGen/AMDGPU/add.ll

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1263,7 +1263,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
12631263
; GFX10-NEXT: ; %bb.1: ; %else
12641264
; GFX10-NEXT: s_add_u32 s4, s4, s6
12651265
; GFX10-NEXT: s_addc_u32 s5, s5, s7
1266-
; GFX10-NEXT: s_mov_b32 s6, 0
12671266
; GFX10-NEXT: s_cbranch_execnz .LBB9_3
12681267
; GFX10-NEXT: .LBB9_2: ; %if
12691268
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
@@ -1275,7 +1274,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
12751274
; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
12761275
; GFX10-NEXT: s_endpgm
12771276
; GFX10-NEXT: .LBB9_4:
1278-
; GFX10-NEXT: s_mov_b32 s6, -1
12791277
; GFX10-NEXT: ; implicit-def: $sgpr4_sgpr5
12801278
; GFX10-NEXT: s_branch .LBB9_2
12811279
;
@@ -1288,7 +1286,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
12881286
; GFX11-NEXT: ; %bb.1: ; %else
12891287
; GFX11-NEXT: s_add_u32 s4, s4, s6
12901288
; GFX11-NEXT: s_addc_u32 s5, s5, s7
1291-
; GFX11-NEXT: s_mov_b32 s6, 0
12921289
; GFX11-NEXT: s_cbranch_execnz .LBB9_3
12931290
; GFX11-NEXT: .LBB9_2: ; %if
12941291
; GFX11-NEXT: s_load_b64 s[4:5], s[2:3], 0x0
@@ -1301,7 +1298,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
13011298
; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
13021299
; GFX11-NEXT: s_endpgm
13031300
; GFX11-NEXT: .LBB9_4:
1304-
; GFX11-NEXT: s_mov_b32 s6, -1
13051301
; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr5
13061302
; GFX11-NEXT: s_branch .LBB9_2
13071303
;
@@ -1313,7 +1309,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
13131309
; GFX12-NEXT: s_cbranch_scc0 .LBB9_4
13141310
; GFX12-NEXT: ; %bb.1: ; %else
13151311
; GFX12-NEXT: s_add_nc_u64 s[4:5], s[4:5], s[6:7]
1316-
; GFX12-NEXT: s_mov_b32 s6, 0
13171312
; GFX12-NEXT: s_cbranch_execnz .LBB9_3
13181313
; GFX12-NEXT: .LBB9_2: ; %if
13191314
; GFX12-NEXT: s_load_b64 s[4:5], s[2:3], 0x0
@@ -1326,7 +1321,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
13261321
; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
13271322
; GFX12-NEXT: s_endpgm
13281323
; GFX12-NEXT: .LBB9_4:
1329-
; GFX12-NEXT: s_mov_b32 s6, -1
13301324
; GFX12-NEXT: ; implicit-def: $sgpr4_sgpr5
13311325
; GFX12-NEXT: s_branch .LBB9_2
13321326
entry:

‎llvm/test/CodeGen/AMDGPU/bundle-latency.mir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ body: |
1414
; GCN-NEXT: $vgpr1 = GLOBAL_LOAD_DWORD undef $vgpr3_vgpr4, 4, 0, implicit $exec
1515
; GCN-NEXT: }
1616
; GCN-NEXT: $vgpr6 = V_ADD_F32_e32 killed $vgpr0, $vgpr0, implicit $mode, implicit $exec
17-
; GCN-NEXT: $vgpr5 = V_ADD_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
17+
; GCN-NEXT: $vgpr5 = V_ADD_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
1818
$vgpr0, $vgpr1 = BUNDLE undef $vgpr3_vgpr4, implicit $exec {
1919
$vgpr0 = GLOBAL_LOAD_DWORD undef $vgpr3_vgpr4, 0, 0, implicit $exec
2020
$vgpr1 = GLOBAL_LOAD_DWORD undef $vgpr3_vgpr4, 4, 0, implicit $exec
@@ -30,10 +30,10 @@ body: |
3030
bb.0:
3131
; GCN-LABEL: name: dst_bundle_latency
3232
; GCN: $vgpr1 = V_ADD_F32_e32 undef $vgpr6, undef $vgpr6, implicit $mode, implicit $exec
33-
; GCN-NEXT: $vgpr0 = V_ADD_F32_e32 undef $vgpr5, undef $vgpr5, implicit $mode, implicit $exec
34-
; GCN-NEXT: BUNDLE killed $vgpr0, killed $vgpr1, undef $vgpr3_vgpr4, implicit $exec {
33+
; GCN-NEXT: $vgpr0 = V_ADD_F32_e32 undef $vgpr5, undef $vgpr5, implicit killed $mode, implicit $exec
34+
; GCN-NEXT: BUNDLE killed $vgpr0, killed $vgpr1, undef $vgpr3_vgpr4, implicit killed $exec {
3535
; GCN-NEXT: GLOBAL_STORE_DWORD undef $vgpr3_vgpr4, killed $vgpr1, 0, 0, implicit $exec
36-
; GCN-NEXT: GLOBAL_STORE_DWORD undef $vgpr3_vgpr4, killed $vgpr0, 4, 0, implicit $exec
36+
; GCN-NEXT: GLOBAL_STORE_DWORD undef $vgpr3_vgpr4, killed $vgpr0, 4, 0, implicit killed $exec
3737
; GCN-NEXT: }
3838
$vgpr0 = V_ADD_F32_e32 undef $vgpr5, undef $vgpr5, implicit $mode, implicit $exec
3939
$vgpr1 = V_ADD_F32_e32 undef $vgpr6, undef $vgpr6, implicit $mode, implicit $exec

‎llvm/test/CodeGen/AMDGPU/ctpop16.ll

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1499,7 +1499,6 @@ define amdgpu_kernel void @ctpop_i16_in_br(ptr addrspace(1) %out, ptr addrspace(
14991499
; SI-NEXT: s_mov_b32 s8, s2
15001500
; SI-NEXT: s_mov_b32 s9, s3
15011501
; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 offset:2
1502-
; SI-NEXT: s_mov_b64 s[2:3], 0
15031502
; SI-NEXT: s_cbranch_execnz .LBB14_3
15041503
; SI-NEXT: .LBB14_2: ; %if
15051504
; SI-NEXT: s_and_b32 s2, s4, 0xffff
@@ -1513,7 +1512,6 @@ define amdgpu_kernel void @ctpop_i16_in_br(ptr addrspace(1) %out, ptr addrspace(
15131512
; SI-NEXT: buffer_store_short v0, off, s[0:3], 0
15141513
; SI-NEXT: s_endpgm
15151514
; SI-NEXT: .LBB14_4:
1516-
; SI-NEXT: s_mov_b64 s[2:3], -1
15171515
; SI-NEXT: v_mov_b32_e32 v0, 0
15181516
; SI-NEXT: s_branch .LBB14_2
15191517
;
@@ -1531,7 +1529,6 @@ define amdgpu_kernel void @ctpop_i16_in_br(ptr addrspace(1) %out, ptr addrspace(
15311529
; VI-NEXT: s_mov_b32 s8, s2
15321530
; VI-NEXT: s_mov_b32 s9, s3
15331531
; VI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 offset:2
1534-
; VI-NEXT: s_mov_b64 s[2:3], 0
15351532
; VI-NEXT: s_cbranch_execnz .LBB14_3
15361533
; VI-NEXT: .LBB14_2: ; %if
15371534
; VI-NEXT: s_and_b32 s2, s4, 0xffff
@@ -1545,7 +1542,6 @@ define amdgpu_kernel void @ctpop_i16_in_br(ptr addrspace(1) %out, ptr addrspace(
15451542
; VI-NEXT: buffer_store_short v0, off, s[0:3], 0
15461543
; VI-NEXT: s_endpgm
15471544
; VI-NEXT: .LBB14_4:
1548-
; VI-NEXT: s_mov_b64 s[2:3], -1
15491545
; VI-NEXT: ; implicit-def: $vgpr0
15501546
; VI-NEXT: s_branch .LBB14_2
15511547
;

‎llvm/test/CodeGen/AMDGPU/ctpop64.ll

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -358,7 +358,6 @@ define amdgpu_kernel void @ctpop_i64_in_br(ptr addrspace(1) %out, ptr addrspace(
358358
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
359359
; SI-NEXT: s_endpgm
360360
; SI-NEXT: .LBB7_4:
361-
; SI-NEXT: s_mov_b64 s[6:7], -1
362361
; SI-NEXT: ; implicit-def: $sgpr0_sgpr1
363362
; SI-NEXT: s_branch .LBB7_2
364363
;
@@ -372,7 +371,6 @@ define amdgpu_kernel void @ctpop_i64_in_br(ptr addrspace(1) %out, ptr addrspace(
372371
; VI-NEXT: s_cbranch_scc0 .LBB7_4
373372
; VI-NEXT: ; %bb.1: ; %else
374373
; VI-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x8
375-
; VI-NEXT: s_mov_b64 s[6:7], 0
376374
; VI-NEXT: s_cbranch_execnz .LBB7_3
377375
; VI-NEXT: .LBB7_2: ; %if
378376
; VI-NEXT: s_waitcnt lgkmcnt(0)
@@ -387,7 +385,6 @@ define amdgpu_kernel void @ctpop_i64_in_br(ptr addrspace(1) %out, ptr addrspace(
387385
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
388386
; VI-NEXT: s_endpgm
389387
; VI-NEXT: .LBB7_4:
390-
; VI-NEXT: s_mov_b64 s[6:7], -1
391388
; VI-NEXT: ; implicit-def: $sgpr0_sgpr1
392389
; VI-NEXT: s_branch .LBB7_2
393390
entry:

‎llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -14,13 +14,13 @@ body: |
1414
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_exec_lo
1515
; CHECK: renamable $vgpr0 = IMPLICIT_DEF
1616
; CHECK-NEXT: S_NOP 0, implicit-def $exec_lo
17-
; CHECK-NEXT: $sgpr0 = S_MOV_B32 $exec_lo
17+
; CHECK-NEXT: $sgpr0 = S_MOV_B32 killed $exec_lo
1818
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, killed $vgpr0
1919
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
2020
; CHECK-NEXT: S_NOP 0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0, implicit killed renamable $sgpr0
2121
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
2222
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
23-
; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
23+
; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
2424
S_NOP 0, implicit-def $exec_lo
2525
%0:sreg_32 = COPY $exec_lo
2626
S_NOP 0, implicit-def %1:sreg_32, implicit-def %2:sreg_32, implicit %0
@@ -39,13 +39,13 @@ body: |
3939
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_exec_hi
4040
; CHECK: renamable $vgpr0 = IMPLICIT_DEF
4141
; CHECK-NEXT: S_NOP 0, implicit-def $exec_hi
42-
; CHECK-NEXT: $sgpr0 = S_MOV_B32 $exec_hi
42+
; CHECK-NEXT: $sgpr0 = S_MOV_B32 killed $exec_hi
4343
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, killed $vgpr0
4444
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
4545
; CHECK-NEXT: S_NOP 0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0, implicit killed renamable $sgpr0
4646
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
4747
; CHECK-NEXT: $exec_hi = S_MOV_B32 killed $sgpr0
48-
; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
48+
; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
4949
S_NOP 0, implicit-def $exec_hi
5050
%0:sreg_32 = COPY $exec_hi
5151
S_NOP 0, implicit-def %1:sreg_32, implicit-def %2:sreg_32, implicit %0
@@ -64,7 +64,7 @@ body: |
6464
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_exec
6565
; CHECK: renamable $vgpr0 = IMPLICIT_DEF
6666
; CHECK-NEXT: S_NOP 0, implicit-def $exec
67-
; CHECK-NEXT: $sgpr0_sgpr1 = S_MOV_B64 $exec
67+
; CHECK-NEXT: $sgpr0_sgpr1 = S_MOV_B64 killed $exec
6868
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, killed $vgpr0, implicit-def $sgpr0_sgpr1, implicit $sgpr0_sgpr1
6969
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr1, 1, killed $vgpr0, implicit $sgpr0_sgpr1
7070
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr0_sgpr1
@@ -73,7 +73,7 @@ body: |
7373
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr0_sgpr1
7474
; CHECK-NEXT: $sgpr1 = V_READLANE_B32 killed $vgpr0, 1
7575
; CHECK-NEXT: $exec = S_MOV_B64 killed $sgpr0_sgpr1
76-
; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
76+
; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
7777
S_NOP 0, implicit-def $exec
7878
%0:sreg_64 = COPY $exec
7979
S_NOP 0, implicit-def %1:sreg_64, implicit-def %2:sreg_64, implicit %0
@@ -100,7 +100,7 @@ body: |
100100
; CHECK-NEXT: S_NOP 0, implicit killed renamable $sgpr0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0
101101
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
102102
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
103-
; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
103+
; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
104104
S_NOP 0, implicit-def %0:sreg_32, implicit-def %1:sreg_32, implicit-def $exec_lo
105105
S_NOP 0, implicit %0, implicit-def %3:sreg_32, implicit-def %4:sreg_32
106106
$exec_lo = COPY %0
@@ -123,7 +123,7 @@ body: |
123123
; CHECK-NEXT: S_NOP 0, implicit killed renamable $sgpr0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0
124124
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
125125
; CHECK-NEXT: $exec_hi = S_MOV_B32 killed $sgpr0
126-
; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
126+
; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
127127
S_NOP 0, implicit-def %0:sreg_32, implicit-def %1:sreg_32, implicit-def $exec_hi
128128
S_NOP 0, implicit %0, implicit-def %3:sreg_32, implicit-def %4:sreg_32
129129
$exec_hi = COPY %0
@@ -149,7 +149,7 @@ body: |
149149
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr0_sgpr1
150150
; CHECK-NEXT: $sgpr1 = V_READLANE_B32 killed $vgpr0, 1
151151
; CHECK-NEXT: $exec = S_MOV_B64 killed $sgpr0_sgpr1
152-
; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
152+
; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
153153
S_NOP 0, implicit-def %0:sreg_64, implicit-def %1:sreg_64, implicit-def $exec
154154
S_NOP 0, implicit %0, implicit-def %3:sreg_64, implicit-def %4:sreg_64
155155
$exec = COPY %0

‎llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,14 +15,14 @@ body: |
1515
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_m0
1616
; CHECK: renamable $vgpr0 = IMPLICIT_DEF
1717
; CHECK-NEXT: S_NOP 0, implicit-def $m0
18-
; CHECK-NEXT: $sgpr0 = S_MOV_B32 $m0
18+
; CHECK-NEXT: $sgpr0 = S_MOV_B32 killed $m0
1919
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, killed $vgpr0
2020
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
2121
; CHECK-NEXT: S_NOP 0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0, implicit killed renamable $sgpr0
2222
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
2323
; CHECK-NEXT: $m0 = S_MOV_B32 killed $sgpr0
2424
; CHECK-NEXT: S_NOP 0
25-
; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
25+
; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
2626
S_NOP 0, implicit-def $m0
2727
%0:sreg_32 = COPY $m0
2828
S_NOP 0, implicit-def %1:sreg_32, implicit-def %2:sreg_32, implicit %0
@@ -51,7 +51,7 @@ body: |
5151
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
5252
; CHECK-NEXT: $m0 = S_MOV_B32 killed $sgpr0
5353
; CHECK-NEXT: S_NOP 0
54-
; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
54+
; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
5555
S_NOP 0, implicit-def %0:sreg_32, implicit-def %1:sreg_32, implicit-def $m0
5656
S_NOP 0, implicit %0, implicit-def %3:sreg_32, implicit-def %4:sreg_32
5757
$m0 = COPY %0

‎llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -10,12 +10,12 @@ define fastcc i32 @foo() {
1010
; CHECK-NEXT: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $vgpr31, $vgpr40, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
1111
; CHECK-NEXT: {{ $}}
1212
; CHECK-NEXT: S_WAITCNT 0
13-
; CHECK-NEXT: $sgpr16 = S_MOV_B32 $sgpr33
13+
; CHECK-NEXT: $sgpr16 = S_MOV_B32 killed $sgpr33
1414
; CHECK-NEXT: $sgpr33 = S_MOV_B32 $sgpr32
15-
; CHECK-NEXT: $sgpr17 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
16-
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
15+
; CHECK-NEXT: $sgpr17 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit killed $exec
16+
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit killed $exec :: (store (s32) into %stack.2, addrspace 5)
1717
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr17
18-
; CHECK-NEXT: $sgpr32 = frame-setup S_ADDK_I32 $sgpr32, 512, implicit-def dead $scc
18+
; CHECK-NEXT: $sgpr32 = frame-setup S_ADDK_I32 killed $sgpr32, 512, implicit-def dead $scc
1919
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr16, 2, undef $vgpr40
2020
; CHECK-NEXT: BUNDLE implicit-def $sgpr16_sgpr17, implicit-def $sgpr16, implicit-def $sgpr16_lo16, implicit-def $sgpr16_hi16, implicit-def $sgpr17, implicit-def $sgpr17_lo16, implicit-def $sgpr17_hi16, implicit-def $scc {
2121
; CHECK-NEXT: $sgpr16_sgpr17 = S_GETPC_B64
@@ -29,8 +29,8 @@ define fastcc i32 @foo() {
2929
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr30, 0, killed $vgpr40
3030
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr31, 1, killed $vgpr40
3131
; CHECK-NEXT: S_WAITCNT 49279
32-
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, @bar, csr_amdgpu, implicit killed $sgpr4_sgpr5, implicit killed $sgpr6_sgpr7, implicit killed $sgpr8_sgpr9, implicit killed $sgpr10_sgpr11, implicit killed $sgpr12, implicit killed $sgpr13, implicit killed $sgpr14, implicit killed $sgpr15, implicit killed $vgpr31, implicit $sgpr0_sgpr1_sgpr2_sgpr3
33-
; CHECK-NEXT: $vcc_lo = S_MOV_B32 $exec_lo
32+
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, @bar, csr_amdgpu, implicit killed $sgpr4_sgpr5, implicit killed $sgpr6_sgpr7, implicit killed $sgpr8_sgpr9, implicit killed $sgpr10_sgpr11, implicit killed $sgpr12, implicit killed $sgpr13, implicit killed $sgpr14, implicit killed $sgpr15, implicit killed $vgpr31, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3
33+
; CHECK-NEXT: $vcc_lo = S_MOV_B32 killed $exec_lo
3434
; CHECK-NEXT: {{ $}}
3535
; CHECK-NEXT: bb.1 (%ir-block.1):
3636
; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.1(0x7c000000)
@@ -44,10 +44,10 @@ define fastcc i32 @foo() {
4444
; CHECK-NEXT: $sgpr31 = V_READLANE_B32 $vgpr40, 1
4545
; CHECK-NEXT: $sgpr30 = V_READLANE_B32 $vgpr40, 0
4646
; CHECK-NEXT: $sgpr4 = V_READLANE_B32 killed $vgpr40, 2
47-
; CHECK-NEXT: $sgpr5 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
48-
; CHECK-NEXT: $vgpr40 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (load (s32) from %stack.2, addrspace 5)
47+
; CHECK-NEXT: $sgpr5 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit killed $exec
48+
; CHECK-NEXT: $vgpr40 = BUFFER_LOAD_DWORD_OFFSET killed $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr33, 0, 0, 0, implicit killed $exec :: (load (s32) from %stack.2, addrspace 5)
4949
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr5
50-
; CHECK-NEXT: $sgpr32 = frame-destroy S_ADDK_I32 $sgpr32, -512, implicit-def dead $scc
50+
; CHECK-NEXT: $sgpr32 = frame-destroy S_ADDK_I32 killed $sgpr32, -512, implicit-def dead $scc
5151
; CHECK-NEXT: $sgpr33 = S_MOV_B32 killed $sgpr4
5252
; CHECK-NEXT: S_WAITCNT 16240
5353
; CHECK-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31, implicit undef $vgpr0

‎llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,6 @@ define amdgpu_kernel void @set_inactive_scc(ptr addrspace(1) %out, i32 %in, <4 x
100100
; GCN-NEXT: s_mov_b32 s3, 0xf000
101101
; GCN-NEXT: s_mov_b32 s2, -1
102102
; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0
103-
; GCN-NEXT: s_mov_b64 s[2:3], 0
104103
; GCN-NEXT: s_cbranch_execnz .LBB4_2
105104
; GCN-NEXT: .LBB4_4: ; %.zero
106105
; GCN-NEXT: s_mov_b32 s3, 0xf000

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