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[clang][NFC] Replace ARM_STREAMING_ATTR in tests with SME streaming attribute
Some tests were testing SME builtins before the streaming attributes existed, and so either inserted them or not depending on a macro definition. The intention was for the macro to be defined once the attributes were added to clang, but it never was defined. This change removes the macro logic and adds the attribute now that they have been added to clang.
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4 files changed

+52
-76
lines changed

4 files changed

+52
-76
lines changed

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c

Lines changed: 13 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,11 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
22
// REQUIRES: aarch64-registered-target
3-
// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
4-
// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
5-
// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
3+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
4+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
5+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
66

77
#include <arm_sme_draft_spec_subject_to_change.h>
88

9-
#ifdef DISABLE_SME_ATTRIBUTES
10-
#define ARM_STREAMING_ATTR
11-
#else
12-
#define ARM_STREAMING_ATTR __attribute__((arm_streaming))
13-
#endif
14-
159
// CHECK-C-LABEL: define dso_local void @test_svld1_hor_za8(
1610
// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], <vscale x 16 x i1> [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
1711
// CHECK-C-NEXT: entry:
@@ -28,7 +22,7 @@
2822
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz(<vscale x 16 x i1> [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]])
2923
// CHECK-CXX-NEXT: ret void
3024
//
31-
ARM_STREAMING_ATTR void test_svld1_hor_za8(uint32_t slice_base, svbool_t pg, const void *ptr) {
25+
void test_svld1_hor_za8(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
3226
svld1_hor_za8(0, slice_base, pg, ptr);
3327
svld1_hor_za8(0, slice_base + 15, pg, ptr);
3428
}
@@ -51,7 +45,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_za8(uint32_t slice_base, svbool_t pg, con
5145
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz(<vscale x 8 x i1> [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]])
5246
// CHECK-CXX-NEXT: ret void
5347
//
54-
ARM_STREAMING_ATTR void test_svld1_hor_za16(uint32_t slice_base, svbool_t pg, const void *ptr) {
48+
void test_svld1_hor_za16(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
5549
svld1_hor_za16(0, slice_base, pg, ptr);
5650
svld1_hor_za16(1, slice_base + 7, pg, ptr);
5751
}
@@ -74,7 +68,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_za16(uint32_t slice_base, svbool_t pg, co
7468
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz(<vscale x 4 x i1> [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]])
7569
// CHECK-CXX-NEXT: ret void
7670
//
77-
ARM_STREAMING_ATTR void test_svld1_hor_za32(uint32_t slice_base, svbool_t pg, const void *ptr) {
71+
void test_svld1_hor_za32(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
7872
svld1_hor_za32(0, slice_base, pg, ptr);
7973
svld1_hor_za32(3, slice_base + 3, pg, ptr);
8074
}
@@ -97,7 +91,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_za32(uint32_t slice_base, svbool_t pg, co
9791
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz(<vscale x 2 x i1> [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]])
9892
// CHECK-CXX-NEXT: ret void
9993
//
100-
ARM_STREAMING_ATTR void test_svld1_hor_za64(uint32_t slice_base, svbool_t pg, const void *ptr) {
94+
void test_svld1_hor_za64(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
10195
svld1_hor_za64(0, slice_base, pg, ptr);
10296
svld1_hor_za64(7, slice_base + 1, pg, ptr);
10397
}
@@ -118,7 +112,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_za64(uint32_t slice_base, svbool_t pg, co
118112
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz(<vscale x 1 x i1> [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]])
119113
// CHECK-CXX-NEXT: ret void
120114
//
121-
ARM_STREAMING_ATTR void test_svld1_hor_za128(uint32_t slice_base, svbool_t pg, const void *ptr) {
115+
void test_svld1_hor_za128(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
122116
svld1_hor_za128(0, slice_base, pg, ptr);
123117
svld1_hor_za128(15, slice_base, pg, ptr);
124118
}
@@ -139,7 +133,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_za128(uint32_t slice_base, svbool_t pg, c
139133
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert(<vscale x 16 x i1> [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]])
140134
// CHECK-CXX-NEXT: ret void
141135
//
142-
ARM_STREAMING_ATTR void test_svld1_ver_za8(uint32_t slice_base, svbool_t pg, const void *ptr) {
136+
void test_svld1_ver_za8(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
143137
svld1_ver_za8(0, slice_base, pg, ptr);
144138
svld1_ver_za8(0, slice_base + 15, pg, ptr);
145139
}
@@ -162,7 +156,7 @@ ARM_STREAMING_ATTR void test_svld1_ver_za8(uint32_t slice_base, svbool_t pg, con
162156
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert(<vscale x 8 x i1> [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]])
163157
// CHECK-CXX-NEXT: ret void
164158
//
165-
ARM_STREAMING_ATTR void test_svld1_ver_za16(uint32_t slice_base, svbool_t pg, const void *ptr) {
159+
void test_svld1_ver_za16(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
166160
svld1_ver_za16(0, slice_base, pg, ptr);
167161
svld1_ver_za16(1, slice_base + 7, pg, ptr);
168162
}
@@ -185,7 +179,7 @@ ARM_STREAMING_ATTR void test_svld1_ver_za16(uint32_t slice_base, svbool_t pg, co
185179
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert(<vscale x 4 x i1> [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]])
186180
// CHECK-CXX-NEXT: ret void
187181
//
188-
ARM_STREAMING_ATTR void test_svld1_ver_za32(uint32_t slice_base, svbool_t pg, const void *ptr) {
182+
void test_svld1_ver_za32(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
189183
svld1_ver_za32(0, slice_base, pg, ptr);
190184
svld1_ver_za32(3, slice_base + 3, pg, ptr);
191185
}
@@ -208,7 +202,7 @@ ARM_STREAMING_ATTR void test_svld1_ver_za32(uint32_t slice_base, svbool_t pg, co
208202
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert(<vscale x 2 x i1> [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]])
209203
// CHECK-CXX-NEXT: ret void
210204
//
211-
ARM_STREAMING_ATTR void test_svld1_ver_za64(uint32_t slice_base, svbool_t pg, const void *ptr) {
205+
void test_svld1_ver_za64(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
212206
svld1_ver_za64(0, slice_base, pg, ptr);
213207
svld1_ver_za64(7, slice_base + 1, pg, ptr);
214208
}
@@ -229,7 +223,7 @@ ARM_STREAMING_ATTR void test_svld1_ver_za64(uint32_t slice_base, svbool_t pg, co
229223
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert(<vscale x 1 x i1> [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]])
230224
// CHECK-CXX-NEXT: ret void
231225
//
232-
ARM_STREAMING_ATTR void test_svld1_ver_za128(uint32_t slice_base, svbool_t pg, const void *ptr) {
226+
void test_svld1_ver_za128(uint32_t slice_base, svbool_t pg, const void *ptr) __arm_streaming {
233227
svld1_ver_za128(0, slice_base, pg, ptr);
234228
svld1_ver_za128(15, slice_base, pg, ptr);
235229
}

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c

Lines changed: 13 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,11 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
22
// REQUIRES: aarch64-registered-target
3-
// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
4-
// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
5-
// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
3+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
4+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
5+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
66

77
#include <arm_sme_draft_spec_subject_to_change.h>
88

9-
#ifdef DISABLE_SME_ATTRIBUTES
10-
#define ARM_STREAMING_ATTR
11-
#else
12-
#define ARM_STREAMING_ATTR __attribute__((arm_streaming))
13-
#endif
14-
159
// CHECK-C-LABEL: define dso_local void @test_svld1_hor_vnum_za8(
1610
// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], <vscale x 16 x i1> [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
1711
// CHECK-C-NEXT: entry:
@@ -34,7 +28,7 @@
3428
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz(<vscale x 16 x i1> [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]])
3529
// CHECK-CXX-NEXT: ret void
3630
//
37-
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za8(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
31+
void test_svld1_hor_vnum_za8(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
3832
svld1_hor_vnum_za8(0, slice_base, pg, ptr, vnum);
3933
svld1_hor_vnum_za8(0, slice_base + 15, pg, ptr, vnum);
4034
}
@@ -63,7 +57,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za8(uint32_t slice_base, svbool_t pg
6357
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz(<vscale x 8 x i1> [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]])
6458
// CHECK-CXX-NEXT: ret void
6559
//
66-
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za16(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
60+
void test_svld1_hor_vnum_za16(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
6761
svld1_hor_vnum_za16(0, slice_base, pg, ptr, vnum);
6862
svld1_hor_vnum_za16(1, slice_base + 7, pg, ptr, vnum);
6963
}
@@ -92,7 +86,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za16(uint32_t slice_base, svbool_t p
9286
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz(<vscale x 4 x i1> [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]])
9387
// CHECK-CXX-NEXT: ret void
9488
//
95-
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za32(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
89+
void test_svld1_hor_vnum_za32(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
9690
svld1_hor_vnum_za32(0, slice_base, pg, ptr, vnum);
9791
svld1_hor_vnum_za32(3, slice_base + 3, pg, ptr, vnum);
9892
}
@@ -121,7 +115,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za32(uint32_t slice_base, svbool_t p
121115
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz(<vscale x 2 x i1> [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]])
122116
// CHECK-CXX-NEXT: ret void
123117
//
124-
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za64(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
118+
void test_svld1_hor_vnum_za64(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
125119
svld1_hor_vnum_za64(0, slice_base, pg, ptr, vnum);
126120
svld1_hor_vnum_za64(7, slice_base + 1, pg, ptr, vnum);
127121
}
@@ -148,7 +142,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za64(uint32_t slice_base, svbool_t p
148142
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz(<vscale x 1 x i1> [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]])
149143
// CHECK-CXX-NEXT: ret void
150144
//
151-
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za128(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
145+
void test_svld1_hor_vnum_za128(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
152146
svld1_hor_vnum_za128(0, slice_base, pg, ptr, vnum);
153147
svld1_hor_vnum_za128(15, slice_base, pg, ptr, vnum);
154148
}
@@ -175,7 +169,7 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za128(uint32_t slice_base, svbool_t
175169
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert(<vscale x 16 x i1> [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]])
176170
// CHECK-CXX-NEXT: ret void
177171
//
178-
ARM_STREAMING_ATTR void test_svld1_ver_hor_za8(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
172+
void test_svld1_ver_hor_za8(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
179173
svld1_ver_vnum_za8(0, slice_base, pg, ptr, vnum);
180174
svld1_ver_vnum_za8(0, slice_base + 15, pg, ptr, vnum);
181175
}
@@ -204,7 +198,7 @@ ARM_STREAMING_ATTR void test_svld1_ver_hor_za8(uint32_t slice_base, svbool_t pg,
204198
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert(<vscale x 8 x i1> [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]])
205199
// CHECK-CXX-NEXT: ret void
206200
//
207-
ARM_STREAMING_ATTR void test_svld1_ver_vnum_za16(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
201+
void test_svld1_ver_vnum_za16(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
208202
svld1_ver_vnum_za16(0, slice_base, pg, ptr, vnum);
209203
svld1_ver_vnum_za16(1, slice_base + 7, pg, ptr, vnum);
210204
}
@@ -233,7 +227,7 @@ ARM_STREAMING_ATTR void test_svld1_ver_vnum_za16(uint32_t slice_base, svbool_t p
233227
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert(<vscale x 4 x i1> [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]])
234228
// CHECK-CXX-NEXT: ret void
235229
//
236-
ARM_STREAMING_ATTR void test_svld1_ver_vnum_za32(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
230+
void test_svld1_ver_vnum_za32(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
237231
svld1_ver_vnum_za32(0, slice_base, pg, ptr, vnum);
238232
svld1_ver_vnum_za32(3, slice_base + 3, pg, ptr, vnum);
239233
}
@@ -262,7 +256,7 @@ ARM_STREAMING_ATTR void test_svld1_ver_vnum_za32(uint32_t slice_base, svbool_t p
262256
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert(<vscale x 2 x i1> [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]])
263257
// CHECK-CXX-NEXT: ret void
264258
//
265-
ARM_STREAMING_ATTR void test_svld1_ver_vnum_za64(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
259+
void test_svld1_ver_vnum_za64(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
266260
svld1_ver_vnum_za64(0, slice_base, pg, ptr, vnum);
267261
svld1_ver_vnum_za64(7, slice_base + 1, pg, ptr, vnum);
268262
}
@@ -289,7 +283,7 @@ ARM_STREAMING_ATTR void test_svld1_ver_vnum_za64(uint32_t slice_base, svbool_t p
289283
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert(<vscale x 1 x i1> [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]])
290284
// CHECK-CXX-NEXT: ret void
291285
//
292-
ARM_STREAMING_ATTR void test_svld1_ver_vnum_za128(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
286+
void test_svld1_ver_vnum_za128(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) __arm_streaming {
293287
svld1_ver_vnum_za128(0, slice_base, pg, ptr, vnum);
294288
svld1_ver_vnum_za128(15, slice_base, pg, ptr, vnum);
295289
}

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