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[GISel] Add RegState::Define to temporary defs in apply patterns (#77425)
Previously, registers created for temporary defs in apply patterns were rendered as uses, resulting in machine verifier errors.
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5 files changed

+75
-19
lines changed

5 files changed

+75
-19
lines changed

‎llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -28,11 +28,11 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
2828

2929
// CHECK: const uint8_t *GenMyCombiner::getMatchTable() const {
3030
// CHECK-NEXT: constexpr static uint8_t MatchTable0[] = {
31-
// CHECK-NEXT: GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(65), GIMT_Encode2(181), /*)*//*default:*//*Label 2*/ GIMT_Encode4(556),
31+
// CHECK-NEXT: GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(65), GIMT_Encode2(181), /*)*//*default:*//*Label 2*/ GIMT_Encode4(558),
3232
// CHECK-NEXT: /*TargetOpcode::G_UNMERGE_VALUES*//*Label 0*/ GIMT_Encode4(474), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
33-
// CHECK-NEXT: /*TargetOpcode::G_FNEG*//*Label 1*/ GIMT_Encode4(524),
33+
// CHECK-NEXT: /*TargetOpcode::G_FNEG*//*Label 1*/ GIMT_Encode4(526),
3434
// CHECK-NEXT: // Label 0: @474
35-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ GIMT_Encode4(523), // Rule ID 1 //
35+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ GIMT_Encode4(525), // Rule ID 1 //
3636
// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule1Enabled),
3737
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
3838
// CHECK-NEXT: // MIs[0] a
@@ -52,15 +52,15 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
5252
// CHECK-NEXT: // Combiner Rule #1: ReplaceTemp
5353
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::G_UNMERGE_VALUES),
5454
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // a
55-
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
55+
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
5656
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // y
5757
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5858
// CHECK-NEXT: GIR_ReplaceRegWithTempReg, /*OldInsnID*/0, /*OldOpIdx*/1, /*TempRegID*/0,
5959
// CHECK-NEXT: GIR_Done,
60-
// CHECK-NEXT: // Label 3: @523
60+
// CHECK-NEXT: // Label 3: @525
6161
// CHECK-NEXT: GIM_Reject,
62-
// CHECK-NEXT: // Label 1: @524
63-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ GIMT_Encode4(555), // Rule ID 0 //
62+
// CHECK-NEXT: // Label 1: @526
63+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ GIMT_Encode4(557), // Rule ID 0 //
6464
// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled),
6565
// CHECK-NEXT: // MIs[0] dst
6666
// CHECK-NEXT: // No operand predicates
@@ -75,10 +75,10 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
7575
// CHECK-NEXT: GIR_ReplaceReg, /*OldInsnID*/0, /*OldOpIdx*/0, /*NewInsnId*/1, /*NewOpIdx*/1,
7676
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
7777
// CHECK-NEXT: GIR_Done,
78-
// CHECK-NEXT: // Label 4: @555
78+
// CHECK-NEXT: // Label 4: @557
7979
// CHECK-NEXT: GIM_Reject,
80-
// CHECK-NEXT: // Label 2: @556
80+
// CHECK-NEXT: // Label 2: @558
8181
// CHECK-NEXT: GIM_Reject,
82-
// CHECK-NEXT: }; // Size: 557 bytes
82+
// CHECK-NEXT: }; // Size: 559 bytes
8383
// CHECK-NEXT: return MatchTable0;
8484
// CHECK-NEXT: }

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
2121

2222
// CHECK: const uint8_t *GenMyCombiner::getMatchTable() const {
2323
// CHECK-NEXT: constexpr static uint8_t MatchTable0[] = {
24-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(79), // Rule ID 0 //
24+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(81), // Rule ID 0 //
2525
// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled),
2626
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_MUL),
2727
// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
@@ -36,7 +36,7 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
3636
// CHECK-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
3737
// CHECK-NEXT: // Combiner Rule #0: InstTest0
3838
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::G_ADD),
39-
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
39+
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
4040
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // b
4141
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4242
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
@@ -45,8 +45,8 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
4545
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // b
4646
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0,
4747
// CHECK-NEXT: GIR_Done,
48-
// CHECK-NEXT: // Label 0: @79
48+
// CHECK-NEXT: // Label 0: @81
4949
// CHECK-NEXT: GIM_Reject,
50-
// CHECK-NEXT: };
50+
// CHECK-NEXT: }; // Size: 82 bytes
5151
// CHECK-NEXT: return MatchTable0;
5252
// CHECK-NEXT: }

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
// RUN: llvm-tblgen -I %p/../../../include -gen-global-isel-combiner \
2+
// RUN: -combiners=MyCombiner %s | FileCheck %s
3+
4+
// Checks that temporary registers defined in apply patterns
5+
// are emitted with RegState::Define.
6+
7+
include "llvm/Target/Target.td"
8+
include "llvm/Target/GlobalISel/Combine.td"
9+
10+
def MyTargetISA : InstrInfo;
11+
def MyTarget : Target { let InstructionSet = MyTargetISA; }
12+
13+
def Test0 : GICombineRule<
14+
(defs root:$dst),
15+
(match (G_ADD $dst, $lhs, $rhs)),
16+
(apply (G_UDIVREM $tmp, $dst, $lhs, $rhs))
17+
>;
18+
19+
def Test1 : GICombineRule<
20+
(defs root:$dst),
21+
(match (G_ADD $dst, $lhs, $rhs)),
22+
(apply (G_UDIVREM $dst, $tmp, $lhs, $rhs))
23+
>;
24+
25+
def Test2 : GICombineRule<
26+
(defs root:$dst),
27+
(match (G_ADD $dst, $lhs, $rhs)),
28+
(apply (G_ADD $tmp, 0, $lhs),
29+
(G_ADD $dst, $tmp, $rhs))
30+
>;
31+
32+
def MyCombiner: GICombiner<"GenMyCombiner", [
33+
Test0,
34+
Test1,
35+
Test2,
36+
]>;
37+
38+
// CHECK: // Combiner Rule #0: Test0
39+
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::G_UDIVREM),
40+
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
41+
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
42+
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // lhs
43+
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rhs
44+
45+
// CHECK: // Combiner Rule #1: Test1
46+
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::G_UDIVREM),
47+
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
48+
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
49+
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // lhs
50+
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rhs
51+
52+
// CHECK: // Combiner Rule #2: Test2
53+
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::G_ADD),
54+
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
55+
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/1,
56+
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // lhs

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ def Test0 : GICombineRule<
1616

1717
// CHECK: const uint8_t *GenMyCombiner::getMatchTable() const {
1818
// CHECK-NEXT: constexpr static uint8_t MatchTable0[] = {
19-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(75), // Rule ID 0 //
19+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(77), // Rule ID 0 //
2020
// CHECK-NEXT: GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled),
2121
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_MUL),
2222
// CHECK-NEXT: // MIs[0] dst
@@ -30,17 +30,17 @@ def Test0 : GICombineRule<
3030
// CHECK-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/uint8_t(-1),
3131
// CHECK-NEXT: // Combiner Rule #0: Test0
3232
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/GIMT_Encode2(TargetOpcode::G_CONSTANT),
33-
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
33+
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(RegState::Define),
3434
// CHECK-NEXT: GIR_AddCImm, /*InsnID*/0, /*Type*/uint8_t(-2), /*Imm*/GIMT_Encode8(42),
3535
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
3636
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::G_SUB),
3737
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/0, // dst
3838
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/1,
3939
// CHECK-NEXT: GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0,
4040
// CHECK-NEXT: GIR_Done,
41-
// CHECK-NEXT: // Label 0: @75
41+
// CHECK-NEXT: // Label 0: @77
4242
// CHECK-NEXT: GIM_Reject,
43-
// CHECK-NEXT: }; // Size: 76 bytes
43+
// CHECK-NEXT: }; // Size: 78 bytes
4444
// CHECK-NEXT: return MatchTable0;
4545
// CHECK-NEXT: }
4646

‎llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2318,7 +2318,7 @@ bool CombineRuleBuilder::emitInstructionApplyPattern(
23182318
M.actions_begin(), getLLTCodeGenOrTempType(Ty, M), TempRegID);
23192319
}
23202320

2321-
DstMI.addRenderer<TempRegRenderer>(TempRegID);
2321+
DstMI.addRenderer<TempRegRenderer>(TempRegID, /*IsDef=*/true);
23222322
}
23232323

23242324
// Render MIFlags

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