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[VPlan] Don't create ExtractElement recipes for scalar plans. (#131604)
ExtractElements are no-ops for scalar VPlans. Don't introduce them in handleUncountableEarlyExit if the plan has only a scalar VF. This fixes a crash trying to compute the cost of ExtractElement after 26ecf97. PR: #131604
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2 files changed

+29
-2
lines changed

2 files changed

+29
-2
lines changed

llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2162,7 +2162,7 @@ void VPlanTransforms::handleUncountableEarlyExit(
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ExitIRI->extractLastLaneOfOperand(MiddleBuilder);
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}
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// Add the incoming value from the early exit.
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if (!IncomingFromEarlyExit->isLiveIn()) {
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if (!IncomingFromEarlyExit->isLiveIn() && !Plan.hasScalarVFOnly()) {
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VPValue *FirstActiveLane = EarlyExitB.createNaryOp(
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VPInstruction::FirstActiveLane, {EarlyExitTakenCond}, nullptr,
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"first.active.lane");

llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll

Lines changed: 28 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; REQUIRES: asserts
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; RUN: opt -S < %s -p loop-vectorize -enable-early-exit-vectorization -disable-output \
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; RUN: -debug-only=loop-vectorize 2>&1 | FileCheck %s --check-prefixes=CHECK
@@ -87,4 +86,32 @@ loop.end:
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ret i64 %retval
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}
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define i64 @vectorization_not_profitable_due_to_trunc(ptr dereferenceable(800) %src) {
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; CHECK-LABEL: LV: Checking a loop in 'vectorization_not_profitable_due_to_trunc'
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; CHECK: LV: Selecting VF: 1.
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; CHECK-NEXT: Calculating cost of work in exit block vector.early.exit:
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; CHECK-NEXT: LV: Vectorization is possible but not beneficial.
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%gep.src = getelementptr inbounds i64, ptr %src, i64 %iv
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%l = load i64, ptr %gep.src, align 1
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%t = trunc i64 %l to i1
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br i1 %t, label %exit.0, label %loop.latch
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loop.latch:
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%iv.next = add i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 100
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br i1 %ec, label %exit.1, label %loop.header
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exit.0:
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%res = phi i64 [ %l, %loop.header ]
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ret i64 %res
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exit.1:
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ret i64 0
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}
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attributes #1 = { "target-features"="+sve" vscale_range(1,16) }

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