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[SystemZ] Use LCGR/AGHI for i64 XOR with -1 (#74882)
LCGR/AGHI is a more compact way of implementing a 64-bit NOT.
1 parent 607f19c commit 07056c2

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4 files changed

+43
-37
lines changed

4 files changed

+43
-37
lines changed

llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1558,6 +1558,9 @@ void SystemZDAGToDAGISel::Select(SDNode *Node) {
15581558
break;
15591559
}
15601560
}
1561+
// Don't split an XOR with -1 as LCGR/AGHI is more compact.
1562+
if (Opcode == ISD::XOR && Op1->isAllOnes())
1563+
break;
15611564
if (!SystemZ::isImmLF(Val) && !SystemZ::isImmHF(Val)) {
15621565
splitLargeImmediate(Opcode, Node, Node->getOperand(0),
15631566
Val - uint32_t(Val), uint32_t(Val));

llvm/lib/Target/SystemZ/SystemZInstrInfo.td

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2263,6 +2263,10 @@ let isCodeGenOnly = 1, hasSideEffects = 1 in {
22632263
def : Pat<(and (xor GR64:$x, (i64 -1)), GR64:$y),
22642264
(XGR GR64:$y, (NGR GR64:$y, GR64:$x))>;
22652265

2266+
// Use LCGR/AGHI for i64 xor with -1.
2267+
def : Pat<(xor GR64:$x, (i64 -1)),
2268+
(AGHI (LCGR GR64:$x), (i64 -1))>;
2269+
22662270
// Shift/rotate instructions only use the last 6 bits of the second operand
22672271
// register, so we can safely use NILL (16 fewer bits than NILF) to only AND the
22682272
// last 16 bits.

llvm/test/CodeGen/SystemZ/atomicrmw-nand-04.ll

Lines changed: 34 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,8 @@ define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
99
; CHECK: [[LABEL:\.[^:]*]]:
1010
; CHECK: lgr %r0, %r2
1111
; CHECK: ngr %r0, %r4
12-
; CHECK: xihf %r0, 4294967295
13-
; CHECK: xilf %r0, 4294967295
12+
; CHECK: lcgr %r0, %r0
13+
; CHECK: aghi %r0, -1
1414
; CHECK: csg %r2, %r0, 0(%r3)
1515
; CHECK: jl [[LABEL]]
1616
; CHECK: br %r14
@@ -21,8 +21,8 @@ define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
2121
; Check NANDs of 1, which are done using a register.
2222
define i64 @f2(i64 %dummy, ptr %src) {
2323
; CHECK-LABEL: f2:
24-
; CHECK: xihf %r0, 4294967295
25-
; CHECK: xilf %r0, 4294967295
24+
; CHECK: lcgr %r0, %r2
25+
; CHECK: aghi %r0, -1
2626
; CHECK: oihf %r0, 4294967295
2727
; CHECK: oilf %r0, 4294967294
2828
; CHECK: br %r14
@@ -34,8 +34,8 @@ define i64 @f3(i64 %dummy, ptr %src) {
3434
; CHECK-LABEL: f3:
3535
; CHECK: lg %r2, 0(%r3)
3636
; CHECK: [[LABEL:\.[^:]*]]:
37-
; CHECK: xihf %r0, 4294967295
38-
; CHECK: xilf %r0, 4294967295
37+
; CHECK: lcgr %r0, %r2
38+
; CHECK: aghi %r0, -1
3939
; CHECK: oihf %r0, 4294967294
4040
; CHECK: jl [[LABEL]]
4141
; CHECK: br %r14
@@ -47,9 +47,8 @@ define i64 @f4(i64 %dummy, ptr %src) {
4747
; CHECK-LABEL: f4:
4848
; CHECK: lg %r2, 0(%r3)
4949
; CHECK: [[LABEL:\.[^:]*]]:
50-
; CHECK: lgr %r0, %r2
51-
; CHECK: xihf %r0, 4294967295
52-
; CHECK: xilf %r0, 4294967295
50+
; CHECK: lcgr %r0, %r2
51+
; CHECK: aghi %r0, -1
5352
; CHECK: oihf %r0, 4294967293
5453
; CHECK: csg %r2, %r0, 0(%r3)
5554
; CHECK: jl [[LABEL]]
@@ -60,8 +59,8 @@ define i64 @f4(i64 %dummy, ptr %src) {
6059

6160
define i64 @f5(i64 %dummy, ptr %src) {
6261
; CHECK-LABEL: f5:
63-
; CHECK: xihf %r0, 4294967295
64-
; CHECK: xilf %r0, 4294967295
62+
; CHECK: lcgr %r0, %r2
63+
; CHECK: aghi %r0, -1
6564
; CHECK: oihf %r0, 4294967292
6665
; CHECK: oilf %r0, 4294967295
6766
; CHECK: br %r14
@@ -71,8 +70,8 @@ define i64 @f5(i64 %dummy, ptr %src) {
7170

7271
define i64 @f6(i64 %dummy, ptr %src) {
7372
; CHECK-LABEL: f6:
74-
; CHECK: xihf %r0, 4294967295
75-
; CHECK: xilf %r0, 4294967295
73+
; CHECK: lcgr %r0, %r2
74+
; CHECK: aghi %r0, -1
7675
; CHECK: oihh %r0, 65533
7776
; CHECK: br %r14
7877
%res = atomicrmw nand ptr %src, i64 844424930131967 seq_cst
@@ -81,8 +80,8 @@ define i64 @f6(i64 %dummy, ptr %src) {
8180

8281
define i64 @f7(i64 %dummy, ptr %src) {
8382
; CHECK-LABEL: f7:
84-
; CHECK: xihf %r0, 4294967295
85-
; CHECK: xilf %r0, 4294967295
83+
; CHECK: lcgr %r0, %r2
84+
; CHECK: aghi %r0, -1
8685
; CHECK: oihf %r0, 4294901759
8786
; CHECK: oilf %r0, 4294967295
8887
; CHECK: br %r14
@@ -92,8 +91,8 @@ define i64 @f7(i64 %dummy, ptr %src) {
9291

9392
define i64 @f8(i64 %dummy, ptr %src) {
9493
; CHECK-LABEL: f8:
95-
; CHECK: xihf %r0, 4294967295
96-
; CHECK: xilf %r0, 4294967295
94+
; CHECK: lcgr %r0, %r2
95+
; CHECK: aghi %r0, -1
9796
; CHECK: oill %r0, 5
9897
; CHECK: br %r14
9998
%res = atomicrmw nand ptr %src, i64 -6 seq_cst
@@ -102,8 +101,8 @@ define i64 @f8(i64 %dummy, ptr %src) {
102101

103102
define i64 @f9(i64 %dummy, ptr %src) {
104103
; CHECK-LABEL: f9:
105-
; CHECK: xihf %r0, 4294967295
106-
; CHECK: xilf %r0, 4294967295
104+
; CHECK: lcgr %r0, %r2
105+
; CHECK: aghi %r0, -1
107106
; CHECK: oill %r0, 65533
108107
; CHECK: br %r14
109108
%res = atomicrmw nand ptr %src, i64 -65534 seq_cst
@@ -112,8 +111,8 @@ define i64 @f9(i64 %dummy, ptr %src) {
112111

113112
define i64 @f10(i64 %dummy, ptr %src) {
114113
; CHECK-LABEL: f10:
115-
; CHECK: xihf %r0, 4294967295
116-
; CHECK: xilf %r0, 4294967295
114+
; CHECK: lcgr %r0, %r2
115+
; CHECK: aghi %r0, -1
117116
; CHECK: oilf %r0, 65537
118117
; CHECK: br %r14
119118
%res = atomicrmw nand ptr %src, i64 -65538 seq_cst
@@ -122,8 +121,8 @@ define i64 @f10(i64 %dummy, ptr %src) {
122121

123122
define i64 @f11(i64 %dummy, ptr %src) {
124123
; CHECK-LABEL: f11:
125-
; CHECK: xihf %r0, 4294967295
126-
; CHECK: xilf %r0, 4294967295
124+
; CHECK: lcgr %r0, %r2
125+
; CHECK: aghi %r0, -1
127126
; CHECK: oilh %r0, 5
128127
; CHECK: br %r14
129128
%res = atomicrmw nand ptr %src, i64 -327681 seq_cst
@@ -132,8 +131,8 @@ define i64 @f11(i64 %dummy, ptr %src) {
132131

133132
define i64 @f12(i64 %dummy, ptr %src) {
134133
; CHECK-LABEL: f12:
135-
; CHECK: xihf %r0, 4294967295
136-
; CHECK: xilf %r0, 4294967295
134+
; CHECK: lcgr %r0, %r2
135+
; CHECK: aghi %r0, -1
137136
; CHECK: oilh %r0, 65533
138137
; CHECK: br %r14
139138
%res = atomicrmw nand ptr %src, i64 -4294770689 seq_cst
@@ -142,8 +141,8 @@ define i64 @f12(i64 %dummy, ptr %src) {
142141

143142
define i64 @f13(i64 %dummy, ptr %src) {
144143
; CHECK-LABEL: f13:
145-
; CHECK: xihf %r0, 4294967295
146-
; CHECK: xilf %r0, 4294967295
144+
; CHECK: lcgr %r0, %r2
145+
; CHECK: aghi %r0, -1
147146
; CHECK: oilf %r0, 4294967293
148147
; CHECK: br %r14
149148
%res = atomicrmw nand ptr %src, i64 -4294967294 seq_cst
@@ -152,8 +151,8 @@ define i64 @f13(i64 %dummy, ptr %src) {
152151

153152
define i64 @f14(i64 %dummy, ptr %src) {
154153
; CHECK-LABEL: f14:
155-
; CHECK: xihf %r0, 4294967295
156-
; CHECK: xilf %r0, 4294967295
154+
; CHECK: lcgr %r0, %r2
155+
; CHECK: aghi %r0, -1
157156
; CHECK: oihl %r0, 5
158157
; CHECK: br %r14
159158
%res = atomicrmw nand ptr %src, i64 -21474836481 seq_cst
@@ -162,8 +161,8 @@ define i64 @f14(i64 %dummy, ptr %src) {
162161

163162
define i64 @f15(i64 %dummy, ptr %src) {
164163
; CHECK-LABEL: f15:
165-
; CHECK: xihf %r0, 4294967295
166-
; CHECK: xilf %r0, 4294967295
164+
; CHECK: lcgr %r0, %r2
165+
; CHECK: aghi %r0, -1
167166
; CHECK: oihl %r0, 65533
168167
; CHECK: br %r14
169168
%res = atomicrmw nand ptr %src, i64 -281462091808769 seq_cst
@@ -172,8 +171,8 @@ define i64 @f15(i64 %dummy, ptr %src) {
172171

173172
define i64 @f16(i64 %dummy, ptr %src) {
174173
; CHECK-LABEL: f16:
175-
; CHECK: xihf %r0, 4294967295
176-
; CHECK: xilf %r0, 4294967295
174+
; CHECK: lcgr %r0, %r2
175+
; CHECK: aghi %r0, -1
177176
; CHECK: oihh %r0, 5
178177
; CHECK: br %r14
179178
%res = atomicrmw nand ptr %src, i64 -1407374883553281 seq_cst
@@ -182,8 +181,8 @@ define i64 @f16(i64 %dummy, ptr %src) {
182181

183182
define i64 @f17(i64 %dummy, ptr %src) {
184183
; CHECK-LABEL: f17:
185-
; CHECK: xihf %r0, 4294967295
186-
; CHECK: xilf %r0, 4294967295
184+
; CHECK: lcgr %r0, %r2
185+
; CHECK: aghi %r0, -1
187186
; CHECK: oihf %r0, 65537
188187
; CHECK: br %r14
189188
%res = atomicrmw nand ptr %src, i64 -281479271677953 seq_cst

llvm/test/CodeGen/SystemZ/xor-04.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -61,8 +61,8 @@ define i64 @f6(i64 %a) {
6161
; Check full bitwise negation
6262
define i64 @f7(i64 %a) {
6363
; CHECK-LABEL: f7:
64-
; CHECK: xihf %r2, 4294967295
65-
; CHECK: xilf %r2, 4294967295
64+
; CHECK: lcgr %r2, %r2
65+
; CHECK: aghi %r2, -1
6666
; CHECK: br %r14
6767
%xor = xor i64 %a, -1
6868
ret i64 %xor

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