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[RISCV] Remove RV32 FIXMEs completed in #107290. NFC
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-10
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll

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@@ -1392,8 +1392,6 @@ define <32 x i64> @vadd_vi_v32i64_unmasked(<32 x i64> %va, i32 zeroext %evl) {
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ret <32 x i64> %v
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}
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1395-
; FIXME: We don't match vadd.vi on RV32.
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define <32 x i64> @vadd_vx_v32i64_evl12(<32 x i64> %va, <32 x i1> %m) {
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; CHECK-LABEL: vadd_vx_v32i64_evl12:
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; CHECK: # %bb.0:

llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll

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@@ -1405,8 +1405,6 @@ define <32 x i64> @vsadd_vi_v32i64_unmasked(<32 x i64> %va, i32 zeroext %evl) {
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ret <32 x i64> %v
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}
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; FIXME: We don't match vsadd.vi on RV32.
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define <32 x i64> @vsadd_vx_v32i64_evl12(<32 x i64> %va, <32 x i1> %m) {
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; CHECK-LABEL: vsadd_vx_v32i64_evl12:
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; CHECK: # %bb.0:

llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll

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@@ -1401,8 +1401,6 @@ define <32 x i64> @vsaddu_vi_v32i64_unmasked(<32 x i64> %va, i32 zeroext %evl) {
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ret <32 x i64> %v
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}
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1404-
; FIXME: We don't match vsaddu.vi on RV32.
1405-
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define <32 x i64> @vsaddu_vx_v32i64_evl12(<32 x i64> %va, <32 x i1> %m) {
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; CHECK-LABEL: vsaddu_vx_v32i64_evl12:
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; CHECK: # %bb.0:

llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll

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@@ -1447,8 +1447,6 @@ define <32 x i64> @vssub_vi_v32i64_unmasked(<32 x i64> %va, i32 zeroext %evl) {
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ret <32 x i64> %v
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}
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1450-
; FIXME: We don't match vssub.vi on RV32.
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define <32 x i64> @vssub_vx_v32i64_evl12(<32 x i64> %va, <32 x i1> %m) {
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; CHECK-LABEL: vssub_vx_v32i64_evl12:
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; CHECK: # %bb.0:

llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll

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@@ -1442,8 +1442,6 @@ define <32 x i64> @vssubu_vi_v32i64_unmasked(<32 x i64> %va, i32 zeroext %evl) {
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ret <32 x i64> %v
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}
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1445-
; FIXME: We don't match vssubu.vi on RV32.
1446-
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define <32 x i64> @vssubu_vx_v32i64_evl12(<32 x i64> %va, <32 x i1> %m) {
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; CHECK-LABEL: vssubu_vx_v32i64_evl12:
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; CHECK: # %bb.0:

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