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Commit 07b2542

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small refactor
1 parent 984b108 commit 07b2542

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+5
-12
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1 file changed

+5
-12
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llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp

Lines changed: 5 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -63,12 +63,8 @@ class AMDGPUInsertDelayAlu : public MachineFunctionPass {
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6464
static bool instructionWaitsForSGPRWrites(const MachineInstr &MI) {
6565
// These instruction types wait for VA_SDST==0 before issuing.
66-
// S_CBRANCH_EXECZ and S_CBRANCH_VCCZ are covered by SALU flag
67-
const uint64_t VA_SDST_0 = SIInstrFlags::SALU | SIInstrFlags::EXP |
68-
SIInstrFlags::DS | SIInstrFlags::SMRD |
69-
SIInstrFlags::MIMG | SIInstrFlags::VIMAGE |
70-
SIInstrFlags::VSAMPLE;
71-
66+
const uint64_t VA_SDST_0 = SIInstrFlags::SALU | SIInstrFlags::SMRD;
67+
7268
if (MI.getDesc().TSFlags & VA_SDST_0)
7369
return true;
7470

@@ -423,16 +419,13 @@ class AMDGPUInsertDelayAlu : public MachineFunctionPass {
423419
if (SII->isVALU(MI.getOpcode())) {
424420
for (const auto &Op : MI.defs()) {
425421
Register Reg = Op.getReg();
426-
for (MCRegUnit Unit : TRI->regunits(Reg)) {
427-
if (AMDGPU::isSGPR(Reg, TRI)) {
428-
lastSGPRfromVALU = Unit;
429-
break;
430-
}
422+
if (AMDGPU::isSGPR(Reg, TRI)) {
423+
lastSGPRfromVALU = *(TRI->regunits(Reg).begin());
424+
break;
431425
}
432426
}
433427
}
434428

435-
436429
if (Emit && !MI.isBundledWithPred()) {
437430
// TODO: For VALU->SALU delays should we use s_delay_alu or s_nop or
438431
// just ignore them?

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