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[PowerPC] Implement builtin for mffsl
mffsl is available since ISA 3.0. The builtin is named with ppc prefix to follow our convention. For targets earlier than power9, GCC generates extra code to support the functionality, while this patch does not implement such behavior. Reviewed By: nemanjai, tuliom Differential Revision: https://reviews.llvm.org/D158065
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clang/include/clang/Basic/BuiltinsPPC.def

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@@ -151,6 +151,7 @@ TARGET_BUILTIN(__builtin_ppc_extract_exp, "Uid", "", "power9-vector")
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TARGET_BUILTIN(__builtin_ppc_extract_sig, "ULLid", "", "power9-vector")
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BUILTIN(__builtin_ppc_mtfsb0, "vUIi", "")
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BUILTIN(__builtin_ppc_mtfsb1, "vUIi", "")
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TARGET_BUILTIN(__builtin_ppc_mffsl, "d", "", "isa-v30-instructions")
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BUILTIN(__builtin_ppc_mtfsf, "vUIiUi", "")
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BUILTIN(__builtin_ppc_mtfsfi, "vUIiUIi", "")
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TARGET_BUILTIN(__builtin_ppc_insert_exp, "ddULLi", "", "power9-vector")

clang/test/CodeGen/PowerPC/builtins-ppc.c

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@@ -35,6 +35,11 @@ void test_builtin_ppc_flm() {
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// CHECK: call double @llvm.ppc.setflm(double %1)
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res = __builtin_setflm(res);
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#ifdef _ARCH_PWR9
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// P9: call double @llvm.ppc.mffsl()
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res = __builtin_ppc_mffsl();
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#endif
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}
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double test_builtin_unpack_ldbl(long double x) {

llvm/include/llvm/IR/IntrinsicsPowerPC.td

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@@ -33,6 +33,10 @@ let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
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def int_ppc_readflm : ClangBuiltin<"__builtin_readflm">,
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DefaultAttrsIntrinsic<[llvm_double_ty], [],
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[IntrNoMerge, IntrHasSideEffects]>;
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def int_ppc_mffsl : ClangBuiltin<"__builtin_ppc_mffsl">,
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DefaultAttrsIntrinsic<[llvm_double_ty], [],
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[IntrNoMerge, IntrHasSideEffects]>;
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// Set FPSCR register, and return previous content
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def int_ppc_setflm : ClangBuiltin<"__builtin_setflm">,
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DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty],

llvm/lib/Target/PowerPC/PPCInstrInfo.td

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@@ -3180,6 +3180,7 @@ def : Pat<(PPCtc_return CTRRC:$dst, imm:$imm),
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(TCRETURNri CTRRC:$dst, imm:$imm)>;
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def : Pat<(int_ppc_readflm), (MFFS)>;
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def : Pat<(int_ppc_mffsl), (MFFSL)>;
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// Hi and Lo for Darwin Global Addresses.
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def : Pat<(PPChi tglobaladdr:$in, 0), (LIS tglobaladdr:$in)>;

llvm/test/CodeGen/PowerPC/read-set-flm.ll

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@@ -148,8 +148,19 @@ entry:
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ret void
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}
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define double @mffsl() {
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; CHECK-LABEL: mffsl:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mffsl 1
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; CHECK-NEXT: blr
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entry:
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%x = call double @llvm.ppc.mffsl()
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ret double %x
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}
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declare void @effect_func()
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declare void @readonly_func() #1
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declare double @llvm.ppc.mffsl()
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declare double @llvm.ppc.readflm()
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declare double @llvm.ppc.setflm(double)
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declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)

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