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[X86] canonicalizeShuffleWithOp - don't bother trying to move shuffles across binops to fold the load. (#126894)
Its not currently used, but is likely to just introduce additional shuffles, resulting in higher Port5 pressure etc. in future patches.
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -41579,8 +41579,7 @@ static SDValue canonicalizeShuffleWithOp(SDValue N, SelectionDAG &DAG,
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EVT ShuffleVT = N.getValueType();
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unsigned Opc = N.getOpcode();
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41582-
auto IsMergeableWithShuffle = [Opc, &DAG](SDValue Op, bool FoldShuf = true,
41583-
bool FoldLoad = false) {
41582+
auto IsMergeableWithShuffle = [Opc, &DAG](SDValue Op, bool FoldShuf = true) {
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// AllZeros/AllOnes constants are freely shuffled and will peek through
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// bitcasts. Other constant build vectors do not peek through bitcasts. Only
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// merge with target shuffles if it has one use so shuffle combining is
@@ -41593,7 +41592,6 @@ static SDValue canonicalizeShuffleWithOp(SDValue N, SelectionDAG &DAG,
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(Op.getOpcode() == Opc && Op->hasOneUse()) ||
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(Op.getOpcode() == ISD::INSERT_SUBVECTOR && Op->hasOneUse()) ||
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(FoldShuf && isTargetShuffle(Op.getOpcode()) && Op->hasOneUse()) ||
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(FoldLoad && isShuffleFoldableLoad(Op)) ||
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DAG.isSplatValue(Op, /*AllowUndefs*/ false);
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};
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auto IsSafeToMoveShuffle = [ShuffleVT](SDValue Op, unsigned BinOp) {
@@ -41629,9 +41627,8 @@ static SDValue canonicalizeShuffleWithOp(SDValue N, SelectionDAG &DAG,
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SDValue Op00 = peekThroughOneUseBitcasts(N0.getOperand(0));
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SDValue Op01 = peekThroughOneUseBitcasts(N0.getOperand(1));
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bool FoldShuf = Opc != X86ISD::VPERMI;
41632-
bool FoldLoad = Opc != X86ISD::PSHUFB;
41633-
if (IsMergeableWithShuffle(Op00, FoldShuf, FoldLoad) ||
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IsMergeableWithShuffle(Op01, FoldShuf, FoldLoad)) {
41630+
if (IsMergeableWithShuffle(Op00, FoldShuf) ||
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IsMergeableWithShuffle(Op01, FoldShuf)) {
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SDValue LHS, RHS;
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Op00 = DAG.getBitcast(ShuffleVT, Op00);
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Op01 = DAG.getBitcast(ShuffleVT, Op01);

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