@@ -485,10 +485,7 @@ if.else:
485
485
486
486
define i1 @test_sign_pos (float %x ) {
487
487
; CHECK-LABEL: @test_sign_pos(
488
- ; CHECK-NEXT: [[FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
489
- ; CHECK-NEXT: [[Y:%.*]] = bitcast float [[FABS]] to i32
490
- ; CHECK-NEXT: [[SIGN:%.*]] = icmp sgt i32 [[Y]], -1
491
- ; CHECK-NEXT: ret i1 [[SIGN]]
488
+ ; CHECK-NEXT: ret i1 true
492
489
;
493
490
%fabs = call float @llvm.fabs.f32 (float %x )
494
491
%y = bitcast float %fabs to i32
@@ -498,11 +495,7 @@ define i1 @test_sign_pos(float %x) {
498
495
499
496
define i1 @test_sign_neg (float %x ) {
500
497
; CHECK-LABEL: @test_sign_neg(
501
- ; CHECK-NEXT: [[FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
502
- ; CHECK-NEXT: [[FNABS:%.*]] = fneg float [[FABS]]
503
- ; CHECK-NEXT: [[Y:%.*]] = bitcast float [[FNABS]] to i32
504
- ; CHECK-NEXT: [[SIGN:%.*]] = icmp slt i32 [[Y]], 0
505
- ; CHECK-NEXT: ret i1 [[SIGN]]
498
+ ; CHECK-NEXT: ret i1 true
506
499
;
507
500
%fabs = call float @llvm.fabs.f32 (float %x )
508
501
%fnabs = fneg float %fabs
@@ -513,10 +506,7 @@ define i1 @test_sign_neg(float %x) {
513
506
514
507
define <2 x i1 > @test_sign_pos_vec (<2 x float > %x ) {
515
508
; CHECK-LABEL: @test_sign_pos_vec(
516
- ; CHECK-NEXT: [[FABS:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[X:%.*]])
517
- ; CHECK-NEXT: [[Y:%.*]] = bitcast <2 x float> [[FABS]] to <2 x i32>
518
- ; CHECK-NEXT: [[SIGN:%.*]] = icmp slt <2 x i32> [[Y]], zeroinitializer
519
- ; CHECK-NEXT: ret <2 x i1> [[SIGN]]
509
+ ; CHECK-NEXT: ret <2 x i1> zeroinitializer
520
510
;
521
511
%fabs = call <2 x float > @llvm.fabs.v2f32 (<2 x float > %x )
522
512
%y = bitcast <2 x float > %fabs to <2 x i32 >
@@ -526,9 +516,7 @@ define <2 x i1> @test_sign_pos_vec(<2 x float> %x) {
526
516
527
517
define i32 @test_inf_only (float nofpclass(nan sub norm zero) %x ) {
528
518
; CHECK-LABEL: @test_inf_only(
529
- ; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
530
- ; CHECK-NEXT: [[AND:%.*]] = bitcast float [[TMP1]] to i32
531
- ; CHECK-NEXT: ret i32 [[AND]]
519
+ ; CHECK-NEXT: ret i32 2130706432
532
520
;
533
521
%y = bitcast float %x to i32
534
522
%and = and i32 %y , 2147483647
@@ -537,9 +525,7 @@ define i32 @test_inf_only(float nofpclass(nan sub norm zero) %x) {
537
525
538
526
define i32 @test_zero_only (float nofpclass(nan sub norm inf) %x ) {
539
527
; CHECK-LABEL: @test_zero_only(
540
- ; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
541
- ; CHECK-NEXT: [[AND:%.*]] = bitcast float [[TMP1]] to i32
542
- ; CHECK-NEXT: ret i32 [[AND]]
528
+ ; CHECK-NEXT: ret i32 0
543
529
;
544
530
%y = bitcast float %x to i32
545
531
%and = and i32 %y , 2147483647
@@ -548,9 +534,7 @@ define i32 @test_zero_only(float nofpclass(nan sub norm inf) %x) {
548
534
549
535
define i32 @test_inf_nan_only (float nofpclass(sub norm zero) %x ) {
550
536
; CHECK-LABEL: @test_inf_nan_only(
551
- ; CHECK-NEXT: [[Y:%.*]] = bitcast float [[X:%.*]] to i32
552
- ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], 2130706432
553
- ; CHECK-NEXT: ret i32 [[AND]]
537
+ ; CHECK-NEXT: ret i32 2130706432
554
538
;
555
539
%y = bitcast float %x to i32
556
540
%and = and i32 %y , 2130706432
@@ -559,9 +543,7 @@ define i32 @test_inf_nan_only(float nofpclass(sub norm zero) %x) {
559
543
560
544
define i32 @test_sub_zero_only (float nofpclass(nan norm inf) %x ) {
561
545
; CHECK-LABEL: @test_sub_zero_only(
562
- ; CHECK-NEXT: [[Y:%.*]] = bitcast float [[X:%.*]] to i32
563
- ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], 2130706432
564
- ; CHECK-NEXT: ret i32 [[AND]]
546
+ ; CHECK-NEXT: ret i32 0
565
547
;
566
548
%y = bitcast float %x to i32
567
549
%and = and i32 %y , 2130706432
@@ -570,9 +552,7 @@ define i32 @test_sub_zero_only(float nofpclass(nan norm inf) %x) {
570
552
571
553
define i32 @test_inf_zero_only (float nofpclass(nan norm sub ) %x ) {
572
554
; CHECK-LABEL: @test_inf_zero_only(
573
- ; CHECK-NEXT: [[Y:%.*]] = bitcast float [[X:%.*]] to i32
574
- ; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], 16777215
575
- ; CHECK-NEXT: ret i32 [[AND]]
555
+ ; CHECK-NEXT: ret i32 0
576
556
;
577
557
%y = bitcast float %x to i32
578
558
%and = and i32 %y , 16777215
@@ -581,11 +561,7 @@ define i32 @test_inf_zero_only(float nofpclass(nan norm sub) %x) {
581
561
582
562
define i1 @test_simplify_icmp (i32 %x ) {
583
563
; CHECK-LABEL: @test_simplify_icmp(
584
- ; CHECK-NEXT: [[CONV_I_I:%.*]] = uitofp i32 [[X:%.*]] to double
585
- ; CHECK-NEXT: [[TMP1:%.*]] = bitcast double [[CONV_I_I]] to i64
586
- ; CHECK-NEXT: [[SHR_I_MASK_I:%.*]] = and i64 [[TMP1]], -140737488355328
587
- ; CHECK-NEXT: [[CMP_I:%.*]] = icmp eq i64 [[SHR_I_MASK_I]], -1970324836974592
588
- ; CHECK-NEXT: ret i1 [[CMP_I]]
564
+ ; CHECK-NEXT: ret i1 false
589
565
;
590
566
%conv.i.i = uitofp i32 %x to double
591
567
%3 = bitcast double %conv.i.i to i64
@@ -600,12 +576,7 @@ define i16 @test_simplify_mask(i32 %ui, float %x) {
600
576
; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[CONV]], [[X:%.*]]
601
577
; CHECK-NEXT: br i1 [[CMP]], label [[IF_ELSE:%.*]], label [[IF_END:%.*]]
602
578
; CHECK: if.end:
603
- ; CHECK-NEXT: [[CAST:%.*]] = bitcast float [[CONV]] to i32
604
- ; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[CAST]], 16
605
- ; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SHR]] to i16
606
- ; CHECK-NEXT: [[AND:%.*]] = and i16 [[TRUNC]], -32768
607
- ; CHECK-NEXT: [[OR:%.*]] = or disjoint i16 [[AND]], 31744
608
- ; CHECK-NEXT: ret i16 [[OR]]
579
+ ; CHECK-NEXT: ret i16 31744
609
580
; CHECK: if.else:
610
581
; CHECK-NEXT: ret i16 0
611
582
;
0 commit comments