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1 parent 9a501eb commit 09b7692Copy full SHA for 09b7692
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -4181,7 +4181,7 @@ bool X86DAGToDAGISel::tryShrinkShlLogicImm(SDNode *N) {
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if (Opcode == ISD::AND) {
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// Find the smallest zext this could possibly be.
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unsigned ZExtWidth = Cst->getAPIntValue().getActiveBits();
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- ZExtWidth = PowerOf2Ceil(std::max(ZExtWidth, 8U));
+ ZExtWidth = llvm::bit_ceil(std::max(ZExtWidth, 8U));
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// Figure out which bits need to be zero to achieve that mask.
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APInt NeededMask = APInt::getLowBitsSet(NVT.getSizeInBits(),
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