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[AMDGPU] Add SubtargetFeature for dynamic VGPR mode (#130030)
This represents a hardware mode supported only for wave32 compute shaders. When enabled, we set the `.dynamic_vgpr_en` field of `.compute_registers` to true in the PAL metadata. This will be changed to use an attribute after downstream consumers have been migrated.
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6 files changed

+41
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‎llvm/docs/AMDGPUUsage.rst

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@@ -758,6 +758,12 @@ For example:
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enabled will execute correctly but may be less
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performant than code generated for XNACK replay
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disabled.
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dynamic-vgpr TODO Represents the "Dynamic VGPR" hardware mode, introduced in GFX12.
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Waves launched in this mode may allocate or deallocate the VGPRs
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using dedicated instructions, but may not send the DEALLOC_VGPRS
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message.
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=============== ============================ ==================================================
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.. _amdgpu-target-id:

‎llvm/lib/Target/AMDGPU/AMDGPU.td

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@@ -1251,6 +1251,12 @@ def FeatureXF32Insts : SubtargetFeature<"xf32-insts",
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"v_mfma_f32_16x16x8_xf32 and v_mfma_f32_32x32x4_xf32"
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>;
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def FeatureDynamicVGPR : SubtargetFeature <"dynamic-vgpr",
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"DynamicVGPR",
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"true",
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"Enable dynamic VGPR mode"
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>;
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// Dummy feature used to disable assembler instructions.
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def FeatureDisable : SubtargetFeature<"",
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"FeatureDisable","true",

‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

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@@ -1415,6 +1415,9 @@ static void EmitPALMetadataCommon(AMDGPUPALMetadata *MD,
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MD->setHwStage(CC, ".trap_present",
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(bool)CurrentProgramInfo.TrapHandlerEnable);
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MD->setHwStage(CC, ".excp_en", CurrentProgramInfo.EXCPEnable);
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if (ST.isDynamicVGPREnabled())
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MD->setComputeRegisters(".dynamic_vgpr_en", true);
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}
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MD->setHwStage(CC, ".lds_size",

‎llvm/lib/Target/AMDGPU/GCNSubtarget.h

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@@ -191,6 +191,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
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/// indicates a lack of S_CLAUSE support.
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unsigned MaxHardClauseLength = 0;
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bool SupportsSRAMECC = false;
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bool DynamicVGPR = false;
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// This should not be used directly. 'TargetID' tracks the dynamic settings
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// for SRAMECC.
@@ -1653,6 +1654,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
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return true;
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}
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bool isDynamicVGPREnabled() const { return DynamicVGPR; }
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bool requiresDisjointEarlyClobberAndUndef() const override {
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// AMDGPU doesn't care if early-clobber and undef operands are allocated
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// to the same register.

‎llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,13 @@
1-
; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,GFX11 %s
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,GFX12 %s
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -mattr=+dynamic-vgpr -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,GFX12,DVGPR %s
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; CHECK: .amdgpu_pal_metadata
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; CHECK-NEXT: ---
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; CHECK-NEXT: amdpal.pipelines:
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; CHECK-NEXT: - .api: Vulkan
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; CHECK-NEXT: .compute_registers:
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; DVGPR-NEXT: .dynamic_vgpr_en: true
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; CHECK-NEXT: .tg_size_en: true
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; CHECK-NEXT: .tgid_x_en: false
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; CHECK-NEXT: .tgid_y_en: false
@@ -16,7 +19,7 @@
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; CHECK-NEXT: .debug_mode: 0
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; CHECK-NEXT: .excp_en: 0
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; CHECK-NEXT: .float_mode: 0xc0
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; CHECK-NEXT: .ieee_mode: true
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; GFX11-NEXT: .ieee_mode: true
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; CHECK-NEXT: .image_op: false
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; CHECK-NEXT: .lds_size: 0x200
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; CHECK-NEXT: .mem_ordered: true
@@ -98,19 +101,22 @@
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; CHECK-NEXT: no_stack_extern_call:
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; CHECK-NEXT: .backend_stack_size: 0x10
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; CHECK-NEXT: .lds_size: 0
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; CHECK-NEXT: .sgpr_count: 0x29
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; GFX11-NEXT: .sgpr_count: 0x29
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; GFX12-NEXT: .sgpr_count: 0x24
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; CHECK-NEXT: .stack_frame_size_in_bytes: 0x10
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; CHECK-NEXT: .vgpr_count: 0x58
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; CHECK-NEXT: no_stack_extern_call_many_args:
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; CHECK-NEXT: .backend_stack_size: 0x90
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; CHECK-NEXT: .lds_size: 0
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; CHECK-NEXT: .sgpr_count: 0x29
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; GFX11-NEXT: .sgpr_count: 0x29
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; GFX12-NEXT: .sgpr_count: 0x24
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; CHECK-NEXT: .stack_frame_size_in_bytes: 0x90
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; CHECK-NEXT: .vgpr_count: 0x58
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; CHECK-NEXT: no_stack_indirect_call:
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; CHECK-NEXT: .backend_stack_size: 0x10
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; CHECK-NEXT: .lds_size: 0
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; CHECK-NEXT: .sgpr_count: 0x29
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; GFX11-NEXT: .sgpr_count: 0x29
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; GFX12-NEXT: .sgpr_count: 0x24
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; CHECK-NEXT: .stack_frame_size_in_bytes: 0x10
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; CHECK-NEXT: .vgpr_count: 0x58
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; CHECK-NEXT: simple_lds:
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; CHECK-NEXT: simple_stack_extern_call:
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; CHECK-NEXT: .backend_stack_size: 0x20
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; CHECK-NEXT: .lds_size: 0
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; CHECK-NEXT: .sgpr_count: 0x29
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; GFX11-NEXT: .sgpr_count: 0x29
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; GFX12-NEXT: .sgpr_count: 0x24
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; CHECK-NEXT: .stack_frame_size_in_bytes: 0x20
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; CHECK-NEXT: .vgpr_count: 0x58
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; CHECK-NEXT: simple_stack_indirect_call:
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; CHECK-NEXT: .backend_stack_size: 0x20
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; CHECK-NEXT: .lds_size: 0
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; CHECK-NEXT: .sgpr_count: 0x29
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; GFX11-NEXT: .sgpr_count: 0x29
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; GFX12-NEXT: .sgpr_count: 0x24
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; CHECK-NEXT: .stack_frame_size_in_bytes: 0x20
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; CHECK-NEXT: .vgpr_count: 0x58
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; CHECK-NEXT: simple_stack_recurse:

‎llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll

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@@ -1,4 +1,6 @@
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 <%s | FileCheck %s
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 <%s | FileCheck %s --check-prefixes=CHECK,GFX11
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 <%s | FileCheck %s --check-prefixes=CHECK
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; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -mattr=+dynamic-vgpr <%s | FileCheck %s --check-prefixes=CHECK,DVGPR
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; CHECK-LABEL: {{^}}_amdgpu_cs_main:
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; CHECK: ; TotalNumSgprs: 4
@@ -8,6 +10,7 @@
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; CHECK-NEXT: amdpal.pipelines:
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; CHECK-NEXT: - .api: Vulkan
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; CHECK-NEXT: .compute_registers:
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; DVGPR-NEXT: .dynamic_vgpr_en: true
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; CHECK-NEXT: .tg_size_en: true
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; CHECK-NEXT: .tgid_x_en: false
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; CHECK-NEXT: .tgid_y_en: false
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; CHECK-NEXT: .entry_point_symbol: _amdgpu_cs_main
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; CHECK-NEXT: .excp_en: 0
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; CHECK-NEXT: .float_mode: 0xc0
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; CHECK-NEXT: .ieee_mode: false
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; GFX11-NEXT: .ieee_mode: false
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; CHECK-NEXT: .image_op: false
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; CHECK-NEXT: .lds_size: 0
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; CHECK-NEXT: .mem_ordered: true
@@ -112,7 +115,7 @@
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; CHECK-NEXT: .debug_mode: false
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; CHECK-NEXT: .entry_point: _amdgpu_gs
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; CHECK-NEXT: .entry_point_symbol: gs_shader
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; CHECK-NEXT: .ieee_mode: false
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; GFX11-NEXT: .ieee_mode: false
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; CHECK-NEXT: .lds_size: 0x200
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; CHECK-NEXT: .mem_ordered: true
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; CHECK-NEXT: .scratch_en: false
@@ -124,7 +127,7 @@
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; CHECK-NEXT: .debug_mode: false
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; CHECK-NEXT: .entry_point: _amdgpu_hs
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; CHECK-NEXT: .entry_point_symbol: hs_shader
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; CHECK-NEXT: .ieee_mode: false
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; GFX11-NEXT: .ieee_mode: false
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; CHECK-NEXT: .lds_size: 0x1000
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; CHECK-NEXT: .mem_ordered: true
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; CHECK-NEXT: .scratch_en: false
@@ -136,7 +139,7 @@
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; CHECK-NEXT: .debug_mode: false
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; CHECK-NEXT: .entry_point: _amdgpu_ps
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; CHECK-NEXT: .entry_point_symbol: ps_shader
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; CHECK-NEXT: .ieee_mode: false
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; GFX11-NEXT: .ieee_mode: false
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; CHECK-NEXT: .lds_size: 0
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; CHECK-NEXT: .mem_ordered: true
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; CHECK-NEXT: .scratch_en: false

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