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[X86] combineConcatVectorOps - pull out repeated getOpcode() calls. NFC.
1 parent 3ff3b29 commit 0a5847f

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-44
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+38
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‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 38 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -57982,7 +57982,8 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5798257982
return combineConcatVectorOps(DL, VT, Subs, DAG, Subtarget, Depth + 1);
5798357983
};
5798457984

57985-
switch (Op0.getOpcode()) {
57985+
unsigned Opcode = Op0.getOpcode();
57986+
switch (Opcode) {
5798657987
case ISD::VECTOR_SHUFFLE: {
5798757988
// TODO: Generalize NumOps support.
5798857989
if (!IsSplat && NumOps == 2 &&
@@ -58039,8 +58040,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5803958040
case X86ISD::MOVSLDUP: {
5804058041
if (!IsSplat && (VT.is256BitVector() ||
5804158042
(VT.is512BitVector() && Subtarget.useAVX512Regs())))
58042-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58043-
ConcatSubOperand(VT, Ops, 0));
58043+
return DAG.getNode(Opcode, DL, VT, ConcatSubOperand(VT, Ops, 0));
5804458044
break;
5804558045
}
5804658046
case X86ISD::SHUFP: {
@@ -58054,7 +58054,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5805458054
SDValue Concat0 = CombineSubOperand(VT, Ops, 0);
5805558055
SDValue Concat1 = CombineSubOperand(VT, Ops, 1);
5805658056
if (Concat0 || Concat1)
58057-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58057+
return DAG.getNode(Opcode, DL, VT,
5805858058
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
5805958059
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1),
5806058060
Op0.getOperand(2));
@@ -58074,8 +58074,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5807458074
peekThroughBitcasts(Op.getOperand(1)).getOpcode() ==
5807558075
ISD::SCALAR_TO_VECTOR;
5807658076
})) {
58077-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58078-
ConcatSubOperand(VT, Ops, 0),
58077+
return DAG.getNode(Opcode, DL, VT, ConcatSubOperand(VT, Ops, 0),
5807958078
ConcatSubOperand(VT, Ops, 1));
5808058079
}
5808158080
break;
@@ -58090,8 +58089,8 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5809058089
llvm::all_of(Ops, [Op0](SDValue Op) {
5809158090
return Op.getOperand(1) == Op0.getOperand(1);
5809258091
})) {
58093-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58094-
ConcatSubOperand(VT, Ops, 0), Op0.getOperand(1));
58092+
return DAG.getNode(Opcode, DL, VT, ConcatSubOperand(VT, Ops, 0),
58093+
Op0.getOperand(1));
5809558094
}
5809658095
[[fallthrough]];
5809758096
case X86ISD::VPERMILPI:
@@ -58112,7 +58111,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5811258111
uint64_t Idx0 = Ops[0].getConstantOperandVal(1);
5811358112
uint64_t Idx1 = Ops[1].getConstantOperandVal(1);
5811458113
uint64_t Idx = ((Idx1 & 3) << 2) | (Idx0 & 3);
58115-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58114+
return DAG.getNode(X86ISD::VPERMILPI, DL, VT,
5811658115
ConcatSubOperand(VT, Ops, 0),
5811758116
DAG.getTargetConstant(Idx, DL, MVT::i8));
5811858117
}
@@ -58130,7 +58129,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5813058129
SDValue Concat1 = CombineSubOperand(SrcVT, Ops, 1);
5813158130
if (Concat0 || Concat1)
5813258131
return DAG.getNode(
58133-
Op0.getOpcode(), DL, VT,
58132+
Opcode, DL, VT,
5813458133
Concat0 ? Concat0 : ConcatSubOperand(SrcVT, Ops, 0),
5813558134
Concat1 ? Concat1 : ConcatSubOperand(SrcVT, Ops, 1));
5813658135
}
@@ -58261,7 +58260,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5826158260
if (SrcVT.isSimple() && SrcVT.is128BitVector() &&
5826258261
SrcVT == Ops[1].getOperand(0).getValueType()) {
5826358262
EVT NewSrcVT = SrcVT.getDoubleNumVectorElementsVT(Ctx);
58264-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58263+
return DAG.getNode(Opcode, DL, VT,
5826558264
ConcatSubOperand(NewSrcVT, Ops, 0));
5826658265
}
5826758266
}
@@ -58287,7 +58286,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5828758286
DAG.getNode(X86ISD::UNPCKL, DL, UnpackVT,
5828858287
DAG.getBitcast(UnpackVT, Ops[0].getOperand(0)),
5828958288
DAG.getBitcast(UnpackVT, Ops[1].getOperand(0)));
58290-
return getEXTEND_VECTOR_INREG(Op0.getOpcode(), DL, VT,
58289+
return getEXTEND_VECTOR_INREG(Opcode, DL, VT,
5829158290
DAG.getBitcast(SrcVT, Unpack), DAG);
5829258291
}
5829358292
break;
@@ -58301,7 +58300,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5830158300
})) {
5830258301
SDValue Res = DAG.getBitcast(MVT::v8i32, ConcatSubOperand(VT, Ops, 0));
5830358302
SDValue Zero = getZeroVector(MVT::v8i32, Subtarget, DAG, DL);
58304-
if (Op0.getOpcode() == X86ISD::VSHLI) {
58303+
if (Opcode == X86ISD::VSHLI) {
5830558304
Res = DAG.getVectorShuffle(MVT::v8i32, DL, Res, Zero,
5830658305
{8, 0, 8, 2, 8, 4, 8, 6});
5830758306
} else {
@@ -58321,8 +58320,8 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5832158320
llvm::all_of(Ops, [Op0](SDValue Op) {
5832258321
return Op0.getOperand(1) == Op.getOperand(1);
5832358322
})) {
58324-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58325-
ConcatSubOperand(VT, Ops, 0), Op0.getOperand(1));
58323+
return DAG.getNode(Opcode, DL, VT, ConcatSubOperand(VT, Ops, 0),
58324+
Op0.getOperand(1));
5832658325
}
5832758326
break;
5832858327
case X86ISD::VPERMI:
@@ -58333,8 +58332,8 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5833358332
llvm::all_of(Ops, [Op0](SDValue Op) {
5833458333
return Op0.getOperand(1) == Op.getOperand(1);
5833558334
})) {
58336-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58337-
ConcatSubOperand(VT, Ops, 0), Op0.getOperand(1));
58335+
return DAG.getNode(Opcode, DL, VT, ConcatSubOperand(VT, Ops, 0),
58336+
Op0.getOperand(1));
5833858337
}
5833958338
break;
5834058339
case ISD::AND:
@@ -58346,15 +58345,15 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5834658345
(VT.is512BitVector() && Subtarget.useAVX512Regs()))) {
5834758346
// Don't concatenate root AVX1 NOT patterns.
5834858347
// TODO: Allow NOT folding if Concat0 succeeds.
58349-
if (Op0.getOpcode() == ISD::XOR && Depth == 0 &&
58350-
!Subtarget.hasInt256() && llvm::all_of(Ops, [](SDValue X) {
58348+
if (Opcode == ISD::XOR && Depth == 0 && !Subtarget.hasInt256() &&
58349+
llvm::all_of(Ops, [](SDValue X) {
5835158350
return ISD::isBuildVectorAllOnes(X.getOperand(1).getNode());
5835258351
}))
5835358352
break;
5835458353
SDValue Concat0 = CombineSubOperand(VT, Ops, 0);
5835558354
SDValue Concat1 = CombineSubOperand(VT, Ops, 1);
5835658355
if (Concat0 || Concat1 || Subtarget.hasInt256())
58357-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58356+
return DAG.getNode(Opcode, DL, VT,
5835858357
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
5835958358
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1));
5836058359
}
@@ -58366,7 +58365,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5836658365
SDValue Concat0 = CombineSubOperand(VT, Ops, 0);
5836758366
SDValue Concat1 = CombineSubOperand(VT, Ops, 1);
5836858367
if (Concat0 || Concat1)
58369-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58368+
return DAG.getNode(Opcode, DL, VT,
5837058369
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
5837158370
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1));
5837258371
break;
@@ -58388,9 +58387,9 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5838858387
}
5838958388

5839058389
ISD::CondCode ICC =
58391-
Op0.getOpcode() == X86ISD::PCMPEQ ? ISD::SETEQ : ISD::SETGT;
58390+
Opcode == X86ISD::PCMPEQ ? ISD::SETEQ : ISD::SETGT;
5839258391
ISD::CondCode FCC =
58393-
Op0.getOpcode() == X86ISD::PCMPEQ ? ISD::SETOEQ : ISD::SETOGT;
58392+
Opcode == X86ISD::PCMPEQ ? ISD::SETOEQ : ISD::SETOGT;
5839458393

5839558394
MVT FpSVT = MVT::getFloatingPointVT(EltSizeInBits);
5839658395
MVT FpVT = VT.changeVectorElementType(FpSVT);
@@ -58420,8 +58419,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5842058419
case ISD::CTLZ_ZERO_UNDEF:
5842158420
if (!IsSplat && ((VT.is256BitVector() && Subtarget.hasInt256()) ||
5842258421
(VT.is512BitVector() && Subtarget.useBWIRegs()))) {
58423-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58424-
ConcatSubOperand(VT, Ops, 0));
58422+
return DAG.getNode(Opcode, DL, VT, ConcatSubOperand(VT, Ops, 0));
5842558423
}
5842658424
break;
5842758425
case X86ISD::GF2P8AFFINEQB:
@@ -58432,8 +58430,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5843258430
llvm::all_of(Ops, [Op0](SDValue Op) {
5843358431
return Op0.getOperand(2) == Op.getOperand(2);
5843458432
})) {
58435-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58436-
ConcatSubOperand(VT, Ops, 0),
58433+
return DAG.getNode(Opcode, DL, VT, ConcatSubOperand(VT, Ops, 0),
5843758434
ConcatSubOperand(VT, Ops, 1), Op0.getOperand(2));
5843858435
}
5843958436
break;
@@ -58447,7 +58444,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5844758444
SDValue Concat0 = CombineSubOperand(VT, Ops, 0);
5844858445
SDValue Concat1 = CombineSubOperand(VT, Ops, 1);
5844958446
if (Concat0 || Concat1)
58450-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58447+
return DAG.getNode(Opcode, DL, VT,
5845158448
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
5845258449
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1));
5845358450
}
@@ -58463,7 +58460,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5846358460
SDValue Concat0 = CombineSubOperand(VT, Ops, 0);
5846458461
SDValue Concat1 = CombineSubOperand(VT, Ops, 1);
5846558462
if (Concat0 || Concat1)
58466-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58463+
return DAG.getNode(Opcode, DL, VT,
5846758464
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
5846858465
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1));
5846958466
}
@@ -58472,8 +58469,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5847258469
case ISD::FDIV:
5847358470
if (!IsSplat && (VT.is256BitVector() ||
5847458471
(VT.is512BitVector() && Subtarget.useAVX512Regs()))) {
58475-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58476-
ConcatSubOperand(VT, Ops, 0),
58472+
return DAG.getNode(Opcode, DL, VT, ConcatSubOperand(VT, Ops, 0),
5847758473
ConcatSubOperand(VT, Ops, 1));
5847858474
}
5847958475
break;
@@ -58486,7 +58482,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5848658482
SDValue Concat0 = CombineSubOperand(VT, Ops, 0);
5848758483
SDValue Concat1 = CombineSubOperand(VT, Ops, 1);
5848858484
if (Concat0 || Concat1)
58489-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58485+
return DAG.getNode(Opcode, DL, VT,
5849058486
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
5849158487
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1));
5849258488
}
@@ -58502,7 +58498,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5850258498
SDValue Concat1 = CombineSubOperand(SrcVT, Ops, 1);
5850358499
if (Concat0 || Concat1)
5850458500
return DAG.getNode(
58505-
Op0.getOpcode(), DL, VT,
58501+
Opcode, DL, VT,
5850658502
Concat0 ? Concat0 : ConcatSubOperand(SrcVT, Ops, 0),
5850758503
Concat1 ? Concat1 : ConcatSubOperand(SrcVT, Ops, 1));
5850858504
}
@@ -58517,7 +58513,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5851758513
SDValue Concat0 = CombineSubOperand(VT, Ops, 0);
5851858514
SDValue Concat1 = CombineSubOperand(VT, Ops, 1);
5851958515
if (Concat0 || Concat1)
58520-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58516+
return DAG.getNode(Opcode, DL, VT,
5852158517
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
5852258518
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1),
5852358519
Op0.getOperand(2));
@@ -58535,7 +58531,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5853558531
APInt Mask = getBLENDIBlendMask(Ops[0]).zext(NumElts);
5853658532
Mask.insertBits(getBLENDIBlendMask(Ops[1]), NumElts / 2);
5853758533
Mask = Mask.zextOrTrunc(8);
58538-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58534+
return DAG.getNode(Opcode, DL, VT,
5853958535
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
5854058536
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1),
5854158537
DAG.getTargetConstant(Mask, DL, MVT::i8));
@@ -58573,25 +58569,23 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5857358569
SelVT = EVT::getVectorVT(Ctx, MVT::i1,
5857458570
NumOps * SelVT.getVectorNumElements());
5857558571
if (TLI.isTypeLegal(SelVT))
58576-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58577-
ConcatSubOperand(SelVT.getSimpleVT(), Ops, 0),
58578-
ConcatSubOperand(VT, Ops, 1),
58579-
ConcatSubOperand(VT, Ops, 2));
58572+
return DAG.getNode(
58573+
Opcode, DL, VT, ConcatSubOperand(SelVT.getSimpleVT(), Ops, 0),
58574+
ConcatSubOperand(VT, Ops, 1), ConcatSubOperand(VT, Ops, 2));
5858058575
}
5858158576
}
5858258577
[[fallthrough]];
5858358578
case X86ISD::BLENDV:
58584-
// TODO: BLENDV should use CombineSubOperand.
58579+
// TODO: BLENDV should use CombineSubOperand.
5858558580
if (!IsSplat && VT.is256BitVector() && NumOps == 2 &&
5858658581
(EltSizeInBits >= 32 || Subtarget.hasInt256()) &&
5858758582
IsConcatFree(VT, Ops, 1) && IsConcatFree(VT, Ops, 2)) {
5858858583
EVT SelVT = Ops[0].getOperand(0).getValueType();
5858958584
SelVT = SelVT.getDoubleNumVectorElementsVT(Ctx);
5859058585
if (TLI.isTypeLegal(SelVT))
58591-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58592-
ConcatSubOperand(SelVT.getSimpleVT(), Ops, 0),
58593-
ConcatSubOperand(VT, Ops, 1),
58594-
ConcatSubOperand(VT, Ops, 2));
58586+
return DAG.getNode(
58587+
Opcode, DL, VT, ConcatSubOperand(SelVT.getSimpleVT(), Ops, 0),
58588+
ConcatSubOperand(VT, Ops, 1), ConcatSubOperand(VT, Ops, 2));
5859558589
}
5859658590
break;
5859758591
}

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