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Revert "[AMDGPU] Always lower s/udiv64 by constant to MUL (#100723)"
This reverts commit 92fbc96. The patch also affected ARM and caused an assertion failure during CurDAG->Legalize (#100723 (comment)).
1 parent 12e3a06 commit 0b92e70

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7 files changed

+1542
-1923
lines changed

7 files changed

+1542
-1923
lines changed

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 2 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -6405,12 +6405,7 @@ SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
64056405
if (VT.isVector())
64066406
WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT,
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VT.getVectorElementCount());
6408-
// Some targets like AMDGPU try to go from SDIV to SDIVREM which is then
6409-
// custom lowered. This is very expensive so avoid it at all costs for
6410-
// constant divisors.
6411-
if ((isOperationExpand(ISD::SDIV, VT) &&
6412-
isOperationCustom(ISD::SDIVREM, VT.getScalarType())) ||
6413-
isOperationLegalOrCustom(ISD::MUL, WideVT)) {
6408+
if (isOperationLegalOrCustom(ISD::MUL, WideVT)) {
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X = DAG.getNode(ISD::SIGN_EXTEND, dl, WideVT, X);
64156410
Y = DAG.getNode(ISD::SIGN_EXTEND, dl, WideVT, Y);
64166411
Y = DAG.getNode(ISD::MUL, dl, WideVT, X, Y);
@@ -6593,12 +6588,7 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
65936588
if (VT.isVector())
65946589
WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT,
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VT.getVectorElementCount());
6596-
// Some targets like AMDGPU try to go from UDIV to UDIVREM which is then
6597-
// custom lowered. This is very expensive so avoid it at all costs for
6598-
// constant divisors.
6599-
if ((isOperationExpand(ISD::UDIV, VT) &&
6600-
isOperationCustom(ISD::UDIVREM, VT.getScalarType())) ||
6601-
isOperationLegalOrCustom(ISD::MUL, WideVT)) {
6591+
if (isOperationLegalOrCustom(ISD::MUL, WideVT)) {
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X = DAG.getNode(ISD::ZERO_EXTEND, dl, WideVT, X);
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Y = DAG.getNode(ISD::ZERO_EXTEND, dl, WideVT, Y);
66046594
Y = DAG.getNode(ISD::MUL, dl, WideVT, X, Y);

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