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AZero13AZero13
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[InstCombine] Pre-commit tests (NFC)
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‎llvm/test/Transforms/InstCombine/ashr-lshr.ll

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -604,3 +604,51 @@ define <2 x i8> @ashr_known_pos_exact_vec(<2 x i8> %x, <2 x i8> %y) {
604604
%r = ashr exact <2 x i8> %p, %y
605605
ret <2 x i8> %r
606606
}
607+
608+
define i32 @ashr_mul_times_3_div_2(i32 %0) {
609+
; CHECK-LABEL: @ashr_mul_times_3_div_2(
610+
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[TMP0:%.*]], 3
611+
; CHECK-NEXT: [[ASHR:%.*]] = ashr i32 [[MUL]], 1
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; CHECK-NEXT: ret i32 [[ASHR]]
613+
;
614+
%mul = mul nsw nuw i32 %0, 3
615+
%ashr = ashr i32 %mul, 1
616+
ret i32 %ashr
617+
}
618+
619+
define i32 @ashr_mul_times_3_div_2_exact(i32 %x) {
620+
; CHECK-LABEL: @ashr_mul_times_3_div_2_exact(
621+
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 3
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; CHECK-NEXT: [[ASHR:%.*]] = ashr exact i32 [[MUL]], 1
623+
; CHECK-NEXT: ret i32 [[ASHR]]
624+
;
625+
%mul = mul nsw i32 %x, 3
626+
%ashr = ashr exact i32 %mul, 1
627+
ret i32 %ashr
628+
}
629+
630+
define i32 @mul_times_3_div_2_multiuse(i32 %x) {
631+
; CHECK-LABEL: @mul_times_3_div_2_multiuse(
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; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 3
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; CHECK-NEXT: [[RES:%.*]] = ashr i32 [[MUL]], 1
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; CHECK-NEXT: call void @use(i32 [[MUL]])
635+
; CHECK-NEXT: ret i32 [[RES]]
636+
;
637+
%mul = mul nuw i32 %x, 3
638+
%res = ashr i32 %mul, 1
639+
call void @use (i32 %mul)
640+
ret i32 %res
641+
}
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define i32 @ashr_mul_times_3_div_2_exact_2(i32 %x) {
644+
; CHECK-LABEL: @ashr_mul_times_3_div_2_exact_2(
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; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 3
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; CHECK-NEXT: [[ASHR:%.*]] = ashr exact i32 [[MUL]], 1
647+
; CHECK-NEXT: ret i32 [[ASHR]]
648+
;
649+
%mul = mul nuw i32 %x, 3
650+
%ashr = ashr exact i32 %mul, 1
651+
ret i32 %ashr
652+
}
653+
654+
declare void @use(i32)

‎llvm/test/Transforms/InstCombine/lshr.ll

Lines changed: 86 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -360,8 +360,56 @@ define <3 x i14> @mul_splat_fold_vec(<3 x i14> %x) {
360360
ret <3 x i14> %t
361361
}
362362

363+
; Negative tests
364+
365+
define i32 @mul_times_3_div_2(i32 %x) {
366+
; CHECK-LABEL: @mul_times_3_div_2(
367+
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[X:%.*]], 3
368+
; CHECK-NEXT: [[RES:%.*]] = lshr i32 [[MUL]], 1
369+
; CHECK-NEXT: ret i32 [[RES]]
370+
;
371+
%mul = mul nsw nuw i32 %x, 3
372+
%res = lshr i32 %mul, 1
373+
ret i32 %res
374+
}
375+
376+
define i32 @shl_add_lshr(i32 %x, i32 %y, i32 %z) {
377+
; CHECK-LABEL: @shl_add_lshr(
378+
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[Y:%.*]]
379+
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[SHL]], [[Z:%.*]]
380+
; CHECK-NEXT: [[RES:%.*]] = lshr exact i32 [[ADD]], [[Z]]
381+
; CHECK-NEXT: ret i32 [[RES]]
382+
;
383+
%shl = shl nuw i32 %x, %y
384+
%add = add nuw nsw i32 %shl, %z
385+
%res = lshr exact i32 %add, %z
386+
ret i32 %res
387+
}
388+
389+
define i32 @lshr_mul_times_3_div_2(i32 %0) {
390+
; CHECK-LABEL: @lshr_mul_times_3_div_2(
391+
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[TMP0:%.*]], 3
392+
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 1
393+
; CHECK-NEXT: ret i32 [[LSHR]]
394+
;
395+
%mul = mul nuw i32 %0, 3
396+
%lshr = lshr i32 %mul, 1
397+
ret i32 %lshr
398+
}
399+
363400
; Negative test
364401

402+
define i32 @mul_times_3_div_2_no_nsw(i32 %x) {
403+
; CHECK-LABEL: @mul_times_3_div_2_no_nsw(
404+
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], 3
405+
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 1
406+
; CHECK-NEXT: ret i32 [[LSHR]]
407+
;
408+
%mul = mul i32 %x, 3
409+
%lshr = lshr i32 %mul, 1
410+
ret i32 %lshr
411+
}
412+
365413
define i32 @mul_splat_fold_wrong_mul_const(i32 %x) {
366414
; CHECK-LABEL: @mul_splat_fold_wrong_mul_const(
367415
; CHECK-NEXT: [[M:%.*]] = mul nuw i32 [[X:%.*]], 65538
@@ -373,7 +421,44 @@ define i32 @mul_splat_fold_wrong_mul_const(i32 %x) {
373421
ret i32 %t
374422
}
375423

376-
; Negative test
424+
define i32 @shl_add_lshr_multiuse(i32 %x, i32 %y, i32 %z) {
425+
; CHECK-LABEL: @shl_add_lshr_multiuse(
426+
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[Y:%.*]]
427+
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[SHL]], [[Z:%.*]]
428+
; CHECK-NEXT: call void @use(i32 [[ADD]])
429+
; CHECK-NEXT: [[RES:%.*]] = lshr exact i32 [[ADD]], [[Z]]
430+
; CHECK-NEXT: ret i32 [[RES]]
431+
;
432+
%shl = shl nuw i32 %x, %y
433+
%add = add nuw nsw i32 %shl, %z
434+
call void @use (i32 %add)
435+
%res = lshr exact i32 %add, %z
436+
ret i32 %res
437+
}
438+
439+
define i32 @mul_times_3_div_2_multiuse(i32 %x) {
440+
; CHECK-LABEL: @mul_times_3_div_2_multiuse(
441+
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 3
442+
; CHECK-NEXT: [[RES:%.*]] = lshr i32 [[MUL]], 1
443+
; CHECK-NEXT: call void @use(i32 [[MUL]])
444+
; CHECK-NEXT: ret i32 [[RES]]
445+
;
446+
%mul = mul nuw i32 %x, 3
447+
%res = lshr i32 %mul, 1
448+
call void @use (i32 %mul)
449+
ret i32 %res
450+
}
451+
452+
define i32 @lshr_mul_times_3_div_2_nsw(i32 %0) {
453+
; CHECK-LABEL: @lshr_mul_times_3_div_2_nsw(
454+
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP0:%.*]], 3
455+
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 1
456+
; CHECK-NEXT: ret i32 [[LSHR]]
457+
;
458+
%mul = mul nsw i32 %0, 3
459+
%lshr = lshr i32 %mul, 1
460+
ret i32 %lshr
461+
}
377462

378463
define i32 @mul_splat_fold_wrong_lshr_const(i32 %x) {
379464
; CHECK-LABEL: @mul_splat_fold_wrong_lshr_const(
@@ -386,8 +471,6 @@ define i32 @mul_splat_fold_wrong_lshr_const(i32 %x) {
386471
ret i32 %t
387472
}
388473

389-
; Negative test
390-
391474
define i32 @mul_splat_fold_no_nuw(i32 %x) {
392475
; CHECK-LABEL: @mul_splat_fold_no_nuw(
393476
; CHECK-NEXT: [[M:%.*]] = mul nsw i32 [[X:%.*]], 65537

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