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MIPS: Fix llvm.{min,max}num for R6 (#93125)
MIPS max.fmt/min.fmt instructions is IEEE2008 compatiable. If either argument is sNaN, the result will be NaN. So we define fminnum_ieee instead of fminnum in Mips32r6InstrInfo.td. We also should define fcanonicalize. So that we can define fminnum as expand to fcanonicalize and fminnum_ieee.
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4 files changed

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‎llvm/lib/Target/Mips/Mips32r6InstrInfo.td

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1119,18 +1119,24 @@ def : MipsPat<(select i32:$cond, immz, i32:$f),
11191119

11201120
// llvm.fmin/fmax operations.
11211121
let AdditionalPredicates = [NotInMicroMips] in {
1122-
def : MipsPat<(fmaxnum f32:$lhs, f32:$rhs),
1122+
def : MipsPat<(fmaxnum_ieee f32:$lhs, f32:$rhs),
11231123
(MAX_S f32:$lhs, f32:$rhs)>,
11241124
ISA_MIPS32R6;
1125-
def : MipsPat<(fmaxnum f64:$lhs, f64:$rhs),
1125+
def : MipsPat<(fmaxnum_ieee f64:$lhs, f64:$rhs),
11261126
(MAX_D f64:$lhs, f64:$rhs)>,
11271127
ISA_MIPS32R6;
1128-
def : MipsPat<(fminnum f32:$lhs, f32:$rhs),
1128+
def : MipsPat<(fminnum_ieee f32:$lhs, f32:$rhs),
11291129
(MIN_S f32:$lhs, f32:$rhs)>,
11301130
ISA_MIPS32R6;
1131-
def : MipsPat<(fminnum f64:$lhs, f64:$rhs),
1131+
def : MipsPat<(fminnum_ieee f64:$lhs, f64:$rhs),
11321132
(MIN_D f64:$lhs, f64:$rhs)>,
11331133
ISA_MIPS32R6;
1134+
def : MipsPat<(f32 (fcanonicalize f32:$src)),
1135+
(MIN_S f32:$src, f32:$src)>,
1136+
ISA_MIPS32R6;
1137+
def : MipsPat<(f64 (fcanonicalize f64:$src)),
1138+
(MIN_D f64:$src, f64:$src)>,
1139+
ISA_MIPS32R6;
11341140
}
11351141

11361142
// Pseudo instructions

‎llvm/lib/Target/Mips/MipsISelLowering.cpp

Lines changed: 9 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -360,11 +360,15 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
360360

361361
// Lower fmin and fmax operations for MIPS R6.
362362
// Instructions are defined but never used.
363-
if (Subtarget.hasMips32r6() || Subtarget.hasMips64r6()) {
364-
setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
365-
setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
366-
setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
367-
setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);
363+
if (Subtarget.hasMips32r6()) {
364+
setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal);
365+
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f32, Legal);
366+
setOperationAction(ISD::FMINNUM, MVT::f32, Expand);
367+
setOperationAction(ISD::FMAXNUM, MVT::f32, Expand);
368+
setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal);
369+
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f64, Legal);
370+
setOperationAction(ISD::FMINNUM, MVT::f64, Expand);
371+
setOperationAction(ISD::FMAXNUM, MVT::f64, Expand);
368372
}
369373

370374
if (Subtarget.isGP64bit()) {

‎llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll

Lines changed: 24 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -6,13 +6,17 @@
66
define float @mins(float %x, float %y) {
77
; MIPS32R6EL-LABEL: mins
88
; MIPS32R6EL: # %bb.0:
9+
; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
10+
; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
911
; MIPS32R6EL-NEXT: jr $ra
10-
; MIPS32R6EL-NEXT: min.s $f0, $f12, $f14
12+
; MIPS32R6EL-NEXT: min.s $f0, $f1, $f0
1113
;
1214
; MIPS64R6EL-LABEL: mins
1315
; MIPS64R6EL: # %bb.0:
16+
; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
17+
; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
1418
; MIPS64R6EL-NEXT: jr $ra
15-
; MIPS64R6EL-NEXT: min.s $f0, $f12, $f13
19+
; MIPS64R6EL-NEXT: min.s $f0, $f1, $f0
1620

1721
%r = tail call float @llvm.minnum.f32(float %x, float %y)
1822
ret float %r
@@ -21,13 +25,17 @@ define float @mins(float %x, float %y) {
2125
define float @maxs(float %x, float %y) {
2226
; MIPS32R6EL-LABEL: maxs
2327
; MIPS32R6EL: # %bb.0:
28+
; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
29+
; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
2430
; MIPS32R6EL-NEXT: jr $ra
25-
; MIPS32R6EL-NEXT: max.s $f0, $f12, $f14
31+
; MIPS32R6EL-NEXT: max.s $f0, $f1, $f0
2632
;
2733
; MIPS64R6EL-LABEL: maxs
2834
; MIPS64R6EL: # %bb.0:
35+
; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
36+
; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
2937
; MIPS64R6EL-NEXT: jr $ra
30-
; MIPS64R6EL-NEXT: max.s $f0, $f12, $f13
38+
; MIPS64R6EL-NEXT: max.s $f0, $f1, $f0
3139

3240
%r = tail call float @llvm.maxnum.f32(float %x, float %y)
3341
ret float %r
@@ -36,13 +44,17 @@ define float @maxs(float %x, float %y) {
3644
define double @mind(double %x, double %y) {
3745
; MIPS32R6EL-LABEL: mind
3846
; MIPS32R6EL: # %bb.0:
47+
; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
48+
; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
3949
; MIPS32R6EL-NEXT: jr $ra
40-
; MIPS32R6EL-NEXT: min.d $f0, $f12, $f14
50+
; MIPS32R6EL-NEXT: min.d $f0, $f1, $f0
4151
;
4252
; MIPS64R6EL-LABEL: mind
4353
; MIPS64R6EL: # %bb.0:
54+
; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
55+
; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
4456
; MIPS64R6EL-NEXT: jr $ra
45-
; MIPS64R6EL-NEXT: min.d $f0, $f12, $f13
57+
; MIPS64R6EL-NEXT: min.d $f0, $f1, $f0
4658

4759
%r = tail call double @llvm.minnum.f64(double %x, double %y)
4860
ret double %r
@@ -51,13 +63,17 @@ define double @mind(double %x, double %y) {
5163
define double @maxd(double %x, double %y) {
5264
; MIPS32R6EL-LABEL: maxd
5365
; MIPS32R6EL: # %bb.0:
66+
; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
67+
; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
5468
; MIPS32R6EL-NEXT: jr $ra
55-
; MIPS32R6EL-NEXT: max.d $f0, $f12, $f14
69+
; MIPS32R6EL-NEXT: max.d $f0, $f1, $f0
5670
;
5771
; MIPS64R6EL-LABEL: maxd
5872
; MIPS64R6EL: # %bb.0:
73+
; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
74+
; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
5975
; MIPS64R6EL-NEXT: jr $ra
60-
; MIPS64R6EL-NEXT: max.d $f0, $f12, $f13
76+
; MIPS64R6EL-NEXT: max.d $f0, $f1, $f0
6177

6278
%r = tail call double @llvm.maxnum.f64(double %x, double %y)
6379
ret double %r

‎llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll

Lines changed: 39 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -2466,13 +2466,14 @@ define void @fminnum(float %b) {
24662466
; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
24672467
; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
24682468
; MIPSR6-O32-NEXT: addu $1, $2, $25
2469+
; MIPSR6-O32-NEXT: min.s $f0, $f12, $f12
24692470
; MIPSR6-O32-NEXT: lw $1, %got(g)($1)
24702471
; MIPSR6-O32-NEXT: lh $2, 0($1)
2471-
; MIPSR6-O32-NEXT: fill.h $w0, $2
2472-
; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
2473-
; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
2474-
; MIPSR6-O32-NEXT: mtc1 $2, $f0
2475-
; MIPSR6-O32-NEXT: min.s $f0, $f0, $f12
2472+
; MIPSR6-O32-NEXT: fill.h $w1, $2
2473+
; MIPSR6-O32-NEXT: fexupr.w $w1, $w1
2474+
; MIPSR6-O32-NEXT: copy_s.w $2, $w1[0]
2475+
; MIPSR6-O32-NEXT: mtc1 $2, $f1
2476+
; MIPSR6-O32-NEXT: min.s $f0, $f1, $f0
24762477
; MIPSR6-O32-NEXT: mfc1 $2, $f0
24772478
; MIPSR6-O32-NEXT: fill.w $w0, $2
24782479
; MIPSR6-O32-NEXT: fexdo.h $w0, $w0, $w0
@@ -2485,13 +2486,14 @@ define void @fminnum(float %b) {
24852486
; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
24862487
; MIPSR6-N32-NEXT: addu $1, $1, $25
24872488
; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fminnum)))
2489+
; MIPSR6-N32-NEXT: min.s $f0, $f12, $f12
24882490
; MIPSR6-N32-NEXT: lw $1, %got_disp(g)($1)
24892491
; MIPSR6-N32-NEXT: lh $2, 0($1)
2490-
; MIPSR6-N32-NEXT: fill.h $w0, $2
2491-
; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
2492-
; MIPSR6-N32-NEXT: copy_s.w $2, $w0[0]
2493-
; MIPSR6-N32-NEXT: mtc1 $2, $f0
2494-
; MIPSR6-N32-NEXT: min.s $f0, $f0, $f12
2492+
; MIPSR6-N32-NEXT: fill.h $w1, $2
2493+
; MIPSR6-N32-NEXT: fexupr.w $w1, $w1
2494+
; MIPSR6-N32-NEXT: copy_s.w $2, $w1[0]
2495+
; MIPSR6-N32-NEXT: mtc1 $2, $f1
2496+
; MIPSR6-N32-NEXT: min.s $f0, $f1, $f0
24952497
; MIPSR6-N32-NEXT: mfc1 $2, $f0
24962498
; MIPSR6-N32-NEXT: fill.w $w0, $2
24972499
; MIPSR6-N32-NEXT: fexdo.h $w0, $w0, $w0
@@ -2504,20 +2506,20 @@ define void @fminnum(float %b) {
25042506
; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
25052507
; MIPSR6-N64-NEXT: daddu $1, $1, $25
25062508
; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fminnum)))
2509+
; MIPSR6-N64-NEXT: min.s $f0, $f12, $f12
25072510
; MIPSR6-N64-NEXT: ld $1, %got_disp(g)($1)
25082511
; MIPSR6-N64-NEXT: lh $2, 0($1)
2509-
; MIPSR6-N64-NEXT: fill.h $w0, $2
2510-
; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
2511-
; MIPSR6-N64-NEXT: copy_s.w $2, $w0[0]
2512-
; MIPSR6-N64-NEXT: mtc1 $2, $f0
2513-
; MIPSR6-N64-NEXT: min.s $f0, $f0, $f12
2512+
; MIPSR6-N64-NEXT: fill.h $w1, $2
2513+
; MIPSR6-N64-NEXT: fexupr.w $w1, $w1
2514+
; MIPSR6-N64-NEXT: copy_s.w $2, $w1[0]
2515+
; MIPSR6-N64-NEXT: mtc1 $2, $f1
2516+
; MIPSR6-N64-NEXT: min.s $f0, $f1, $f0
25142517
; MIPSR6-N64-NEXT: mfc1 $2, $f0
25152518
; MIPSR6-N64-NEXT: fill.w $w0, $2
25162519
; MIPSR6-N64-NEXT: fexdo.h $w0, $w0, $w0
25172520
; MIPSR6-N64-NEXT: copy_u.h $2, $w0[0]
25182521
; MIPSR6-N64-NEXT: jr $ra
25192522
; MIPSR6-N64-NEXT: sh $2, 0($1)
2520-
;
25212523
entry:
25222524
%0 = load i16, ptr @g, align 2
25232525
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
@@ -2632,17 +2634,18 @@ define void @fmaxnum(float %b) {
26322634
; MIPS64R5-N64-NEXT: daddiu $sp, $sp, 32
26332635
;
26342636
; MIPSR6-O32-LABEL: fmaxnum:
2635-
; MIPSR6-O32: # %bb.0:
2637+
; MIPSR6-O32: # %bb.0: # %entry
26362638
; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
26372639
; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
26382640
; MIPSR6-O32-NEXT: addu $1, $2, $25
2641+
; MIPSR6-O32-NEXT: min.s $f0, $f12, $f12
26392642
; MIPSR6-O32-NEXT: lw $1, %got(g)($1)
26402643
; MIPSR6-O32-NEXT: lh $2, 0($1)
2641-
; MIPSR6-O32-NEXT: fill.h $w0, $2
2642-
; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
2643-
; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
2644-
; MIPSR6-O32-NEXT: mtc1 $2, $f0
2645-
; MIPSR6-O32-NEXT: max.s $f0, $f0, $f12
2644+
; MIPSR6-O32-NEXT: fill.h $w1, $2
2645+
; MIPSR6-O32-NEXT: fexupr.w $w1, $w1
2646+
; MIPSR6-O32-NEXT: copy_s.w $2, $w1[0]
2647+
; MIPSR6-O32-NEXT: mtc1 $2, $f1
2648+
; MIPSR6-O32-NEXT: max.s $f0, $f1, $f0
26462649
; MIPSR6-O32-NEXT: mfc1 $2, $f0
26472650
; MIPSR6-O32-NEXT: fill.w $w0, $2
26482651
; MIPSR6-O32-NEXT: fexdo.h $w0, $w0, $w0
@@ -2651,17 +2654,18 @@ define void @fmaxnum(float %b) {
26512654
; MIPSR6-O32-NEXT: sh $2, 0($1)
26522655
;
26532656
; MIPSR6-N32-LABEL: fmaxnum:
2654-
; MIPSR6-N32: # %bb.0:
2657+
; MIPSR6-N32: # %bb.0: # %entry
26552658
; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
26562659
; MIPSR6-N32-NEXT: addu $1, $1, $25
26572660
; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fmaxnum)))
2661+
; MIPSR6-N32-NEXT: min.s $f0, $f12, $f12
26582662
; MIPSR6-N32-NEXT: lw $1, %got_disp(g)($1)
26592663
; MIPSR6-N32-NEXT: lh $2, 0($1)
2660-
; MIPSR6-N32-NEXT: fill.h $w0, $2
2661-
; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
2662-
; MIPSR6-N32-NEXT: copy_s.w $2, $w0[0]
2663-
; MIPSR6-N32-NEXT: mtc1 $2, $f0
2664-
; MIPSR6-N32-NEXT: max.s $f0, $f0, $f12
2664+
; MIPSR6-N32-NEXT: fill.h $w1, $2
2665+
; MIPSR6-N32-NEXT: fexupr.w $w1, $w1
2666+
; MIPSR6-N32-NEXT: copy_s.w $2, $w1[0]
2667+
; MIPSR6-N32-NEXT: mtc1 $2, $f1
2668+
; MIPSR6-N32-NEXT: max.s $f0, $f1, $f0
26652669
; MIPSR6-N32-NEXT: mfc1 $2, $f0
26662670
; MIPSR6-N32-NEXT: fill.w $w0, $2
26672671
; MIPSR6-N32-NEXT: fexdo.h $w0, $w0, $w0
@@ -2670,17 +2674,18 @@ define void @fmaxnum(float %b) {
26702674
; MIPSR6-N32-NEXT: sh $2, 0($1)
26712675
;
26722676
; MIPSR6-N64-LABEL: fmaxnum:
2673-
; MIPSR6-N64: # %bb.0:
2677+
; MIPSR6-N64: # %bb.0: # %entry
26742678
; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
26752679
; MIPSR6-N64-NEXT: daddu $1, $1, $25
26762680
; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fmaxnum)))
2681+
; MIPSR6-N64-NEXT: min.s $f0, $f12, $f12
26772682
; MIPSR6-N64-NEXT: ld $1, %got_disp(g)($1)
26782683
; MIPSR6-N64-NEXT: lh $2, 0($1)
2679-
; MIPSR6-N64-NEXT: fill.h $w0, $2
2680-
; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
2681-
; MIPSR6-N64-NEXT: copy_s.w $2, $w0[0]
2682-
; MIPSR6-N64-NEXT: mtc1 $2, $f0
2683-
; MIPSR6-N64-NEXT: max.s $f0, $f0, $f12
2684+
; MIPSR6-N64-NEXT: fill.h $w1, $2
2685+
; MIPSR6-N64-NEXT: fexupr.w $w1, $w1
2686+
; MIPSR6-N64-NEXT: copy_s.w $2, $w1[0]
2687+
; MIPSR6-N64-NEXT: mtc1 $2, $f1
2688+
; MIPSR6-N64-NEXT: max.s $f0, $f1, $f0
26842689
; MIPSR6-N64-NEXT: mfc1 $2, $f0
26852690
; MIPSR6-N64-NEXT: fill.w $w0, $2
26862691
; MIPSR6-N64-NEXT: fexdo.h $w0, $w0, $w0

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