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‎llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll

Lines changed: 98 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,20 @@ entry:
2929
ret <vscale x 1 x i8> %1
3030
}
3131

32+
define <vscale x 1 x i8> @test_vlseg2_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_2t(ptr %base, i64 %vl) {
33+
; CHECK-LABEL: test_vlseg2_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_2t:
34+
; CHECK: # %bb.0: # %entry
35+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
36+
; CHECK-NEXT: vmset.m v0
37+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
38+
; CHECK-NEXT: vlseg2e8.v v7, (a0), v0.t
39+
; CHECK-NEXT: ret
40+
entry:
41+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vlseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) undef, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
42+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %0, i32 1)
43+
ret <vscale x 1 x i8> %1
44+
}
45+
3246
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv2i8_2t(target("riscv.vector.tuple", <vscale x 2 x i8>, 2), ptr, i64, i64)
3347
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 2) @llvm.riscv.vlseg2.mask.triscv.vector.tuple_nxv2i8_2t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 2), ptr, <vscale x 2 x i1>, i64, i64, i64)
3448

@@ -191,6 +205,20 @@ entry:
191205
ret <vscale x 1 x i8> %1
192206
}
193207

208+
define <vscale x 1 x i8> @test_vlseg3_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_3t(ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {
209+
; CHECK-LABEL: test_vlseg3_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_3t:
210+
; CHECK: # %bb.0: # %entry
211+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
212+
; CHECK-NEXT: vmset.m v0
213+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
214+
; CHECK-NEXT: vlseg3e8.v v7, (a0), v0.t
215+
; CHECK-NEXT: ret
216+
entry:
217+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vlseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) undef, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
218+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_3t(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) %0, i32 1)
219+
ret <vscale x 1 x i8> %1
220+
}
221+
194222
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vlseg3.triscv.vector.tuple_nxv2i8_3t(target("riscv.vector.tuple", <vscale x 2 x i8>, 3), ptr, i64, i64)
195223
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 3) @llvm.riscv.vlseg3.mask.triscv.vector.tuple_nxv2i8_3t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 3), ptr, <vscale x 2 x i1>, i64, i64, i64)
196224

@@ -326,6 +354,20 @@ entry:
326354
ret <vscale x 1 x i8> %1
327355
}
328356

357+
define <vscale x 1 x i8> @test_vlseg4_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_4t(ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {
358+
; CHECK-LABEL: test_vlseg4_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_4t:
359+
; CHECK: # %bb.0: # %entry
360+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
361+
; CHECK-NEXT: vmset.m v0
362+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
363+
; CHECK-NEXT: vlseg4e8.v v7, (a0), v0.t
364+
; CHECK-NEXT: ret
365+
entry:
366+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vlseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) undef, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
367+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_4t(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) %0, i32 1)
368+
ret <vscale x 1 x i8> %1
369+
}
370+
329371
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vlseg4.triscv.vector.tuple_nxv2i8_4t(target("riscv.vector.tuple", <vscale x 2 x i8>, 4), ptr, i64, i64)
330372
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 4) @llvm.riscv.vlseg4.mask.triscv.vector.tuple_nxv2i8_4t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 4), ptr, <vscale x 2 x i1>, i64, i64, i64)
331373

@@ -461,6 +503,20 @@ entry:
461503
ret <vscale x 1 x i8> %1
462504
}
463505

506+
define <vscale x 1 x i8> @test_vlseg5_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_5t(ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {
507+
; CHECK-LABEL: test_vlseg5_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_5t:
508+
; CHECK: # %bb.0: # %entry
509+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
510+
; CHECK-NEXT: vmset.m v0
511+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
512+
; CHECK-NEXT: vlseg5e8.v v7, (a0), v0.t
513+
; CHECK-NEXT: ret
514+
entry:
515+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vlseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) undef, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
516+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_5t(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) %0, i32 1)
517+
ret <vscale x 1 x i8> %1
518+
}
519+
464520
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vlseg5.triscv.vector.tuple_nxv2i8_5t(target("riscv.vector.tuple", <vscale x 2 x i8>, 5), ptr, i64, i64)
465521
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @llvm.riscv.vlseg5.mask.triscv.vector.tuple_nxv2i8_5t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 5), ptr, <vscale x 2 x i1>, i64, i64, i64)
466522

@@ -569,6 +625,20 @@ entry:
569625
ret <vscale x 1 x i8> %1
570626
}
571627

628+
define <vscale x 1 x i8> @test_vlseg6_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_6t(ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {
629+
; CHECK-LABEL: test_vlseg6_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_6t:
630+
; CHECK: # %bb.0: # %entry
631+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
632+
; CHECK-NEXT: vmset.m v0
633+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
634+
; CHECK-NEXT: vlseg6e8.v v7, (a0), v0.t
635+
; CHECK-NEXT: ret
636+
entry:
637+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vlseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) undef, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
638+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_6t(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) %0, i32 1)
639+
ret <vscale x 1 x i8> %1
640+
}
641+
572642
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vlseg6.triscv.vector.tuple_nxv2i8_6t(target("riscv.vector.tuple", <vscale x 2 x i8>, 6), ptr, i64, i64)
573643
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 6) @llvm.riscv.vlseg6.mask.triscv.vector.tuple_nxv2i8_6t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 6), ptr, <vscale x 2 x i1>, i64, i64, i64)
574644

@@ -677,6 +747,20 @@ entry:
677747
ret <vscale x 1 x i8> %1
678748
}
679749

750+
define <vscale x 1 x i8> @test_vlseg7_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_7t(ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {
751+
; CHECK-LABEL: test_vlseg7_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_7t:
752+
; CHECK: # %bb.0: # %entry
753+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
754+
; CHECK-NEXT: vmset.m v0
755+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
756+
; CHECK-NEXT: vlseg7e8.v v7, (a0), v0.t
757+
; CHECK-NEXT: ret
758+
entry:
759+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vlseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) undef, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
760+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_7t(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) %0, i32 1)
761+
ret <vscale x 1 x i8> %1
762+
}
763+
680764
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vlseg7.triscv.vector.tuple_nxv2i8_7t(target("riscv.vector.tuple", <vscale x 2 x i8>, 7), ptr, i64, i64)
681765
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 7) @llvm.riscv.vlseg7.mask.triscv.vector.tuple_nxv2i8_7t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 7), ptr, <vscale x 2 x i1>, i64, i64, i64)
682766

@@ -785,6 +869,20 @@ entry:
785869
ret <vscale x 1 x i8> %1
786870
}
787871

872+
define <vscale x 1 x i8> @test_vlseg8_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_8t(ptr %base, i64 %vl, <vscale x 1 x i1> %mask) {
873+
; CHECK-LABEL: test_vlseg8_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_8t:
874+
; CHECK: # %bb.0: # %entry
875+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
876+
; CHECK-NEXT: vmset.m v0
877+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
878+
; CHECK-NEXT: vlseg8e8.v v7, (a0), v0.t
879+
; CHECK-NEXT: ret
880+
entry:
881+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vlseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) undef, ptr %base, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
882+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_8t(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) %0, i32 1)
883+
ret <vscale x 1 x i8> %1
884+
}
885+
788886
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vlseg8.triscv.vector.tuple_nxv2i8_8t(target("riscv.vector.tuple", <vscale x 2 x i8>, 8), ptr, i64, i64)
789887
declare target("riscv.vector.tuple", <vscale x 2 x i8>, 8) @llvm.riscv.vlseg8.mask.triscv.vector.tuple_nxv2i8_8t.nxv2i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 8), ptr, <vscale x 2 x i1>, i64, i64, i64)
790888

‎llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll

Lines changed: 105 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,21 @@ entry:
3131
ret <vscale x 1 x i8> %1
3232
}
3333

34+
define <vscale x 1 x i8> @test_vluxseg2_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8(ptr %base, <vscale x 1 x i8> %index, i64 %vl, <vscale x 1 x i1> %mask) {
35+
; CHECK-LABEL: test_vluxseg2_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_2t_nxv1i8:
36+
; CHECK: # %bb.0: # %entry
37+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
38+
; CHECK-NEXT: vmset.m v0
39+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
40+
; CHECK-NEXT: vluxseg2ei8.v v9, (a0), v8, v0.t
41+
; CHECK-NEXT: vmv1r.v v8, v10
42+
; CHECK-NEXT: ret
43+
entry:
44+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) undef, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
45+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_2t(target("riscv.vector.tuple", <vscale x 1 x i8>, 2) %0, i32 1)
46+
ret <vscale x 1 x i8> %1
47+
}
48+
3449
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.triscv.vector.tuple_nxv1i8_2t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 2), ptr, <vscale x 1 x i16>, i64, i64)
3550
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 2) @llvm.riscv.vluxseg2.mask.triscv.vector.tuple_nxv1i8_2t.nxv1i16.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 2), ptr, <vscale x 1 x i16>, <vscale x 1 x i1>, i64, i64, i64)
3651

@@ -640,6 +655,21 @@ entry:
640655
ret <vscale x 1 x i8> %1
641656
}
642657

658+
define <vscale x 1 x i8> @test_vluxseg3_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8(ptr %base, <vscale x 1 x i8> %index, i64 %vl, <vscale x 1 x i1> %mask) {
659+
; CHECK-LABEL: test_vluxseg3_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_3t_nxv1i8:
660+
; CHECK: # %bb.0: # %entry
661+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
662+
; CHECK-NEXT: vmset.m v0
663+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
664+
; CHECK-NEXT: vluxseg3ei8.v v9, (a0), v8, v0.t
665+
; CHECK-NEXT: vmv1r.v v8, v10
666+
; CHECK-NEXT: ret
667+
entry:
668+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) undef, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
669+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_3t(target("riscv.vector.tuple", <vscale x 1 x i8>, 3) %0, i32 1)
670+
ret <vscale x 1 x i8> %1
671+
}
672+
643673
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.triscv.vector.tuple_nxv1i8_3t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 3), ptr, <vscale x 1 x i16>, i64, i64)
644674
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 3) @llvm.riscv.vluxseg3.mask.triscv.vector.tuple_nxv1i8_3t.nxv1i16.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 3), ptr, <vscale x 1 x i16>, <vscale x 1 x i1>, i64, i64, i64)
645675

@@ -1191,6 +1221,21 @@ entry:
11911221
ret <vscale x 1 x i8> %1
11921222
}
11931223

1224+
define <vscale x 1 x i8> @test_vluxseg4_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8(ptr %base, <vscale x 1 x i8> %index, i64 %vl, <vscale x 1 x i1> %mask) {
1225+
; CHECK-LABEL: test_vluxseg4_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_4t_nxv1i8:
1226+
; CHECK: # %bb.0: # %entry
1227+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
1228+
; CHECK-NEXT: vmset.m v0
1229+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
1230+
; CHECK-NEXT: vluxseg4ei8.v v9, (a0), v8, v0.t
1231+
; CHECK-NEXT: vmv1r.v v8, v10
1232+
; CHECK-NEXT: ret
1233+
entry:
1234+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) undef, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
1235+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_4t(target("riscv.vector.tuple", <vscale x 1 x i8>, 4) %0, i32 1)
1236+
ret <vscale x 1 x i8> %1
1237+
}
1238+
11941239
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.triscv.vector.tuple_nxv1i8_4t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 4), ptr, <vscale x 1 x i16>, i64, i64)
11951240
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 4) @llvm.riscv.vluxseg4.mask.triscv.vector.tuple_nxv1i8_4t.nxv1i16.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 4), ptr, <vscale x 1 x i16>, <vscale x 1 x i1>, i64, i64, i64)
11961241

@@ -1742,6 +1787,21 @@ entry:
17421787
ret <vscale x 1 x i8> %1
17431788
}
17441789

1790+
define <vscale x 1 x i8> @test_vluxseg5_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8(ptr %base, <vscale x 1 x i8> %index, i64 %vl, <vscale x 1 x i1> %mask) {
1791+
; CHECK-LABEL: test_vluxseg5_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_5t_nxv1i8:
1792+
; CHECK: # %bb.0: # %entry
1793+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
1794+
; CHECK-NEXT: vmset.m v0
1795+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
1796+
; CHECK-NEXT: vluxseg5ei8.v v9, (a0), v8, v0.t
1797+
; CHECK-NEXT: vmv1r.v v8, v10
1798+
; CHECK-NEXT: ret
1799+
entry:
1800+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) undef, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
1801+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_5t(target("riscv.vector.tuple", <vscale x 1 x i8>, 5) %0, i32 1)
1802+
ret <vscale x 1 x i8> %1
1803+
}
1804+
17451805
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.triscv.vector.tuple_nxv1i8_5t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 5), ptr, <vscale x 1 x i16>, i64, i64)
17461806
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 5) @llvm.riscv.vluxseg5.mask.triscv.vector.tuple_nxv1i8_5t.nxv1i16.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 5), ptr, <vscale x 1 x i16>, <vscale x 1 x i1>, i64, i64, i64)
17471807

@@ -2206,6 +2266,21 @@ entry:
22062266
ret <vscale x 1 x i8> %1
22072267
}
22082268

2269+
define <vscale x 1 x i8> @test_vluxseg6_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8(ptr %base, <vscale x 1 x i8> %index, i64 %vl, <vscale x 1 x i1> %mask) {
2270+
; CHECK-LABEL: test_vluxseg6_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_6t_nxv1i8:
2271+
; CHECK: # %bb.0: # %entry
2272+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
2273+
; CHECK-NEXT: vmset.m v0
2274+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
2275+
; CHECK-NEXT: vluxseg6ei8.v v9, (a0), v8, v0.t
2276+
; CHECK-NEXT: vmv1r.v v8, v10
2277+
; CHECK-NEXT: ret
2278+
entry:
2279+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) undef, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
2280+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_6t(target("riscv.vector.tuple", <vscale x 1 x i8>, 6) %0, i32 1)
2281+
ret <vscale x 1 x i8> %1
2282+
}
2283+
22092284
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.triscv.vector.tuple_nxv1i8_6t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 6), ptr, <vscale x 1 x i16>, i64, i64)
22102285
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 6) @llvm.riscv.vluxseg6.mask.triscv.vector.tuple_nxv1i8_6t.nxv1i16.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 6), ptr, <vscale x 1 x i16>, <vscale x 1 x i1>, i64, i64, i64)
22112286

@@ -2670,6 +2745,21 @@ entry:
26702745
ret <vscale x 1 x i8> %1
26712746
}
26722747

2748+
define <vscale x 1 x i8> @test_vluxseg7_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8(ptr %base, <vscale x 1 x i8> %index, i64 %vl, <vscale x 1 x i1> %mask) {
2749+
; CHECK-LABEL: test_vluxseg7_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_7t_nxv1i8:
2750+
; CHECK: # %bb.0: # %entry
2751+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
2752+
; CHECK-NEXT: vmset.m v0
2753+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
2754+
; CHECK-NEXT: vluxseg7ei8.v v9, (a0), v8, v0.t
2755+
; CHECK-NEXT: vmv1r.v v8, v10
2756+
; CHECK-NEXT: ret
2757+
entry:
2758+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) undef, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
2759+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_7t(target("riscv.vector.tuple", <vscale x 1 x i8>, 7) %0, i32 1)
2760+
ret <vscale x 1 x i8> %1
2761+
}
2762+
26732763
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.triscv.vector.tuple_nxv1i8_7t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 7), ptr, <vscale x 1 x i16>, i64, i64)
26742764
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 7) @llvm.riscv.vluxseg7.mask.triscv.vector.tuple_nxv1i8_7t.nxv1i16.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 7), ptr, <vscale x 1 x i16>, <vscale x 1 x i1>, i64, i64, i64)
26752765

@@ -3134,6 +3224,21 @@ entry:
31343224
ret <vscale x 1 x i8> %1
31353225
}
31363226

3227+
define <vscale x 1 x i8> @test_vluxseg8_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8(ptr %base, <vscale x 1 x i8> %index, i64 %vl, <vscale x 1 x i1> %mask) {
3228+
; CHECK-LABEL: test_vluxseg8_allonesmask_nxv1i8_triscv.vector.tuple_nxv1i8_8t_nxv1i8:
3229+
; CHECK: # %bb.0: # %entry
3230+
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
3231+
; CHECK-NEXT: vmset.m v0
3232+
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
3233+
; CHECK-NEXT: vluxseg8ei8.v v9, (a0), v8, v0.t
3234+
; CHECK-NEXT: vmv1r.v v8, v10
3235+
; CHECK-NEXT: ret
3236+
entry:
3237+
%0 = tail call target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i1.nxv1i8(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) undef, ptr %base, <vscale x 1 x i8> %index, <vscale x 1 x i1> splat (i1 true), i64 %vl, i64 1, i64 3)
3238+
%1 = call <vscale x 1 x i8> @llvm.riscv.tuple.extract.nxv1i8.triscv.vector.tuple_nxv1i8_8t(target("riscv.vector.tuple", <vscale x 1 x i8>, 8) %0, i32 1)
3239+
ret <vscale x 1 x i8> %1
3240+
}
3241+
31373242
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.triscv.vector.tuple_nxv1i8_8t.nxv1i16(target("riscv.vector.tuple", <vscale x 1 x i8>, 8), ptr, <vscale x 1 x i16>, i64, i64)
31383243
declare target("riscv.vector.tuple", <vscale x 1 x i8>, 8) @llvm.riscv.vluxseg8.mask.triscv.vector.tuple_nxv1i8_8t.nxv1i16.nxv1i1(target("riscv.vector.tuple", <vscale x 1 x i8>, 8), ptr, <vscale x 1 x i16>, <vscale x 1 x i1>, i64, i64, i64)
31393244

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