fixup! [AArch64] Stop manually reserved registers from being saved in prolog/epilog

yasuna-oribe · yasuna-oribe · commit 0c7d8ae34252 · 2025-05-06T03:55:55.000Z
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -3619,7 +3619,7 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
     if (Reg == BasePointerReg)
       SavedRegs.set(Reg);
 
-    // Don't save manually reserved registers set through -ffixed-reg.
+    // Don't save manually reserved registers set through +reserve-x#i.
     if (RegInfo->isUserReservedReg(MF, Reg)) {
       SavedRegs.reset(Reg);
       continue;
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -523,7 +523,7 @@ AArch64RegisterInfo::getUserReservedRegs(const MachineFunction &MF) const {
   BitVector Reserved(getNumRegs());
   for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) {
     // ReserveXRegister is set for registers manually reserved
-    // through -ffixed-reg.
+    // through +reserve-x#i.
     if (MF.getSubtarget<AArch64Subtarget>().isXRegisterReserved(i))
       markSuperRegs(Reserved, AArch64::GPR32commonRegClass.getRegister(i));
   }

Original file line number	Diff line number	Diff line change
`@@ -523,7 +523,7 @@ AArch64RegisterInfo::getUserReservedRegs(const MachineFunction &MF) const {`
`523`	`523`	`BitVector Reserved(getNumRegs());`
`524`	`524`	`for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) {`
`525`	`525`	`// ReserveXRegister is set for registers manually reserved`
`526`		`- // through -ffixed-reg.`
	`526`	`+ // through +reserve-x#i.`
`527`	`527`	`if (MF.getSubtarget<AArch64Subtarget>().isXRegisterReserved(i))`
`528`	`528`	`markSuperRegs(Reserved, AArch64::GPR32commonRegClass.getRegister(i));`
`529`	`529`	`}`