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3 | 3 |
|
4 | 4 | declare void @may_unwind()
|
5 | 5 |
|
6 |
| -define i1 @test_switch_in_block_with_assume(i32 %x) { |
| 6 | +define i1 @test_switch_in_block_with_assume(i8 %x) { |
7 | 7 | ; CHECK-LABEL: @test_switch_in_block_with_assume(
|
8 | 8 | ; CHECK-NEXT: entry:
|
9 | 9 | ; CHECK-NEXT: call void @may_unwind()
|
10 |
| -; CHECK-NEXT: [[C_1:%.*]] = icmp ult i32 [[X:%.*]], 10 |
| 10 | +; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[X:%.*]], 10 |
11 | 11 | ; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
|
12 |
| -; CHECK-NEXT: switch i32 0, label [[EXIT_1:%.*]] [ |
13 |
| -; CHECK-NEXT: i32 1, label [[EXIT_2:%.*]] |
| 12 | +; CHECK-NEXT: switch i8 0, label [[EXIT_1:%.*]] [ |
| 13 | +; CHECK-NEXT: i8 1, label [[EXIT_2:%.*]] |
14 | 14 | ; CHECK-NEXT: ]
|
15 | 15 | ; CHECK: exit.1:
|
16 |
| -; CHECK-NEXT: [[C_2:%.*]] = icmp ult i32 [[X]], 9 |
| 16 | +; CHECK-NEXT: [[C_2:%.*]] = icmp ult i8 [[X]], 9 |
17 | 17 | ; CHECK-NEXT: [[RES_1:%.*]] = xor i1 true, [[C_2]]
|
18 | 18 | ; CHECK-NEXT: ret i1 [[RES_1]]
|
19 | 19 | ; CHECK: exit.2:
|
20 |
| -; CHECK-NEXT: [[C_3:%.*]] = icmp ult i32 [[X]], 9 |
| 20 | +; CHECK-NEXT: [[C_3:%.*]] = icmp ult i8 [[X]], 9 |
21 | 21 | ; CHECK-NEXT: [[RES_2:%.*]] = xor i1 true, [[C_3]]
|
22 | 22 | ; CHECK-NEXT: ret i1 [[RES_2]]
|
23 | 23 | ;
|
24 | 24 | entry:
|
25 | 25 | call void @may_unwind()
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26 |
| - %c.1 = icmp ult i32 %x, 10 |
| 26 | + %c.1 = icmp ult i8 %x, 10 |
27 | 27 | call void @llvm.assume(i1 %c.1)
|
28 |
| - switch i32 0, label %exit.1 [ |
29 |
| - i32 1, label %exit.2 |
| 28 | + switch i8 0, label %exit.1 [ |
| 29 | + i8 1, label %exit.2 |
30 | 30 | ]
|
31 | 31 |
|
32 | 32 | exit.1:
|
33 |
| - %t.1 = icmp ult i32 %x, 10 |
34 |
| - %c.2 = icmp ult i32 %x, 9 |
| 33 | + %t.1 = icmp ult i8 %x, 10 |
| 34 | + %c.2 = icmp ult i8 %x, 9 |
35 | 35 | %res.1 = xor i1 %t.1, %c.2
|
36 | 36 | ret i1 %res.1
|
37 | 37 |
|
38 | 38 | exit.2:
|
39 |
| - %t.2 = icmp ult i32 %x, 10 |
40 |
| - %c.3 = icmp ult i32 %x, 9 |
| 39 | + %t.2 = icmp ult i8 %x, 10 |
| 40 | + %c.3 = icmp ult i8 %x, 9 |
41 | 41 | %res.2 = xor i1 %t.2, %c.3
|
42 | 42 | ret i1 %res.2
|
43 | 43 | }
|
44 | 44 |
|
45 | 45 | declare void @llvm.assume(i1)
|
46 | 46 |
|
47 |
| -define i1 @simplify_based_on_switch(i32 %x) { |
| 47 | +define i1 @simplify_based_on_switch(i8 %x) { |
48 | 48 | ; CHECK-LABEL: @simplify_based_on_switch(
|
49 | 49 | ; CHECK-NEXT: entry:
|
50 |
| -; CHECK-NEXT: switch i32 [[X:%.*]], label [[EXIT_1:%.*]] [ |
51 |
| -; CHECK-NEXT: i32 6, label [[EXIT_2:%.*]] |
52 |
| -; CHECK-NEXT: i32 10, label [[EXIT_3:%.*]] |
| 50 | +; CHECK-NEXT: switch i8 [[X:%.*]], label [[EXIT_1:%.*]] [ |
| 51 | +; CHECK-NEXT: i8 6, label [[EXIT_2:%.*]] |
| 52 | +; CHECK-NEXT: i8 10, label [[EXIT_3:%.*]] |
53 | 53 | ; CHECK-NEXT: ]
|
54 | 54 | ; CHECK: exit.1:
|
55 |
| -; CHECK-NEXT: [[C_1:%.*]] = icmp ult i32 [[X]], 7 |
56 |
| -; CHECK-NEXT: [[C_2:%.*]] = icmp ult i32 [[X]], 6 |
| 55 | +; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[X]], 7 |
| 56 | +; CHECK-NEXT: [[C_2:%.*]] = icmp ult i8 [[X]], 6 |
57 | 57 | ; CHECK-NEXT: [[RES_1:%.*]] = xor i1 [[C_1]], [[C_2]]
|
58 | 58 | ; CHECK-NEXT: ret i1 [[RES_1]]
|
59 | 59 | ; CHECK: exit.2:
|
60 |
| -; CHECK-NEXT: [[T_1:%.*]] = icmp ult i32 [[X]], 7 |
61 |
| -; CHECK-NEXT: [[F_1:%.*]] = icmp ult i32 [[X]], 6 |
| 60 | +; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[X]], 7 |
| 61 | +; CHECK-NEXT: [[F_1:%.*]] = icmp ult i8 [[X]], 6 |
62 | 62 | ; CHECK-NEXT: [[RES_2:%.*]] = xor i1 [[T_1]], [[F_1]]
|
63 | 63 | ; CHECK-NEXT: ret i1 [[RES_2]]
|
64 | 64 | ; CHECK: exit.3:
|
65 |
| -; CHECK-NEXT: [[T_2:%.*]] = icmp ult i32 [[X]], 11 |
66 |
| -; CHECK-NEXT: [[F_2:%.*]] = icmp ult i32 [[X]], 10 |
| 65 | +; CHECK-NEXT: [[T_2:%.*]] = icmp ult i8 [[X]], 11 |
| 66 | +; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[X]], 10 |
67 | 67 | ; CHECK-NEXT: [[RES_3:%.*]] = xor i1 [[T_2]], [[F_2]]
|
68 | 68 | ; CHECK-NEXT: ret i1 [[RES_3]]
|
69 | 69 | ;
|
70 | 70 | entry:
|
71 |
| - switch i32 %x, label %exit.1 [ |
72 |
| - i32 6, label %exit.2 |
73 |
| - i32 10, label %exit.3 |
| 71 | + switch i8 %x, label %exit.1 [ |
| 72 | + i8 6, label %exit.2 |
| 73 | + i8 10, label %exit.3 |
74 | 74 | ]
|
75 | 75 |
|
76 | 76 | exit.1:
|
77 |
| - %c.1 = icmp ult i32 %x, 7 |
78 |
| - %c.2 = icmp ult i32 %x, 6 |
| 77 | + %c.1 = icmp ult i8 %x, 7 |
| 78 | + %c.2 = icmp ult i8 %x, 6 |
79 | 79 | %res.1 = xor i1 %c.1, %c.2
|
80 | 80 | ret i1 %res.1
|
81 | 81 |
|
82 | 82 | exit.2:
|
83 |
| - %t.1 = icmp ult i32 %x, 7 |
84 |
| - %f.1 = icmp ult i32 %x, 6 |
| 83 | + %t.1 = icmp ult i8 %x, 7 |
| 84 | + %f.1 = icmp ult i8 %x, 6 |
85 | 85 | %res.2 = xor i1 %t.1, %f.1
|
86 | 86 | ret i1 %res.2
|
87 | 87 |
|
88 | 88 | exit.3:
|
89 |
| - %t.2 = icmp ult i32 %x, 11 |
90 |
| - %f.2 = icmp ult i32 %x, 10 |
| 89 | + %t.2 = icmp ult i8 %x, 11 |
| 90 | + %f.2 = icmp ult i8 %x, 10 |
91 | 91 | %res.3 = xor i1 %t.2, %f.2
|
92 | 92 | ret i1 %res.3
|
93 | 93 | }
|
94 | 94 |
|
95 |
| -define i1 @simplify_based_on_switch_successor_branches(i32 %x) { |
| 95 | +define i1 @simplify_based_on_switch_successor_branches(i8 %x) { |
96 | 96 | ; CHECK-LABEL: @simplify_based_on_switch_successor_branches(
|
97 | 97 | ; CHECK-NEXT: entry:
|
98 |
| -; CHECK-NEXT: switch i32 [[X:%.*]], label [[EXIT_1:%.*]] [ |
99 |
| -; CHECK-NEXT: i32 6, label [[EXIT_2:%.*]] |
100 |
| -; CHECK-NEXT: i32 10, label [[EXIT_3:%.*]] |
| 98 | +; CHECK-NEXT: switch i8 [[X:%.*]], label [[EXIT_1:%.*]] [ |
| 99 | +; CHECK-NEXT: i8 6, label [[EXIT_2:%.*]] |
| 100 | +; CHECK-NEXT: i8 10, label [[EXIT_3:%.*]] |
101 | 101 | ; CHECK-NEXT: ]
|
102 | 102 | ; CHECK: exit.1:
|
103 |
| -; CHECK-NEXT: [[C_1:%.*]] = icmp ult i32 [[X]], 7 |
104 |
| -; CHECK-NEXT: [[C_2:%.*]] = icmp ult i32 [[X]], 6 |
| 103 | +; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[X]], 7 |
| 104 | +; CHECK-NEXT: [[C_2:%.*]] = icmp ult i8 [[X]], 6 |
105 | 105 | ; CHECK-NEXT: [[RES_1:%.*]] = xor i1 [[C_1]], [[C_2]]
|
106 | 106 | ; CHECK-NEXT: ret i1 [[RES_1]]
|
107 | 107 | ; CHECK: exit.2:
|
108 |
| -; CHECK-NEXT: [[T_1:%.*]] = icmp ult i32 [[X]], 7 |
109 |
| -; CHECK-NEXT: [[F_1:%.*]] = icmp ult i32 [[X]], 6 |
| 108 | +; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[X]], 7 |
| 109 | +; CHECK-NEXT: [[F_1:%.*]] = icmp ult i8 [[X]], 6 |
110 | 110 | ; CHECK-NEXT: [[RES_2:%.*]] = xor i1 [[T_1]], [[F_1]]
|
111 | 111 | ; CHECK-NEXT: call void @use(i1 [[RES_2]])
|
112 | 112 | ; CHECK-NEXT: br label [[EXIT_3]]
|
113 | 113 | ; CHECK: exit.3:
|
114 |
| -; CHECK-NEXT: [[C_3:%.*]] = icmp ult i32 [[X]], 11 |
115 |
| -; CHECK-NEXT: [[C_4:%.*]] = icmp ult i32 [[X]], 10 |
| 114 | +; CHECK-NEXT: [[C_3:%.*]] = icmp ult i8 [[X]], 11 |
| 115 | +; CHECK-NEXT: [[C_4:%.*]] = icmp ult i8 [[X]], 10 |
116 | 116 | ; CHECK-NEXT: [[RES_3:%.*]] = xor i1 [[C_3]], [[C_4]]
|
117 | 117 | ; CHECK-NEXT: ret i1 [[RES_3]]
|
118 | 118 | ;
|
119 | 119 | entry:
|
120 |
| - switch i32 %x, label %exit.1 [ |
121 |
| - i32 6, label %exit.2 |
122 |
| - i32 10, label %exit.3 |
| 120 | + switch i8 %x, label %exit.1 [ |
| 121 | + i8 6, label %exit.2 |
| 122 | + i8 10, label %exit.3 |
123 | 123 | ]
|
124 | 124 |
|
125 | 125 | exit.1:
|
126 |
| - %c.1 = icmp ult i32 %x, 7 |
127 |
| - %c.2 = icmp ult i32 %x, 6 |
| 126 | + %c.1 = icmp ult i8 %x, 7 |
| 127 | + %c.2 = icmp ult i8 %x, 6 |
128 | 128 | %res.1 = xor i1 %c.1, %c.2
|
129 | 129 | ret i1 %res.1
|
130 | 130 |
|
131 | 131 | exit.2:
|
132 |
| - %t.1 = icmp ult i32 %x, 7 |
133 |
| - %f.1 = icmp ult i32 %x, 6 |
| 132 | + %t.1 = icmp ult i8 %x, 7 |
| 133 | + %f.1 = icmp ult i8 %x, 6 |
134 | 134 | %res.2 = xor i1 %t.1, %f.1
|
135 | 135 | call void @use(i1 %res.2)
|
136 | 136 | br label %exit.3
|
137 | 137 |
|
138 | 138 | exit.3:
|
139 |
| - %c.3 = icmp ult i32 %x, 11 |
140 |
| - %c.4 = icmp ult i32 %x, 10 |
| 139 | + %c.3 = icmp ult i8 %x, 11 |
| 140 | + %c.4 = icmp ult i8 %x, 10 |
141 | 141 | %res.3 = xor i1 %c.3, %c.4
|
142 | 142 | ret i1 %res.3
|
143 | 143 | }
|
144 | 144 |
|
| 145 | +define i1 @switch_same_destination_for_different_cases(i8 %x) { |
| 146 | +; CHECK-LABEL: @switch_same_destination_for_different_cases( |
| 147 | +; CHECK-NEXT: entry: |
| 148 | +; CHECK-NEXT: switch i8 [[X:%.*]], label [[EXIT_1:%.*]] [ |
| 149 | +; CHECK-NEXT: i8 6, label [[EXIT_2:%.*]] |
| 150 | +; CHECK-NEXT: i8 10, label [[EXIT_2]] |
| 151 | +; CHECK-NEXT: ] |
| 152 | +; CHECK: exit.1: |
| 153 | +; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[X]], 7 |
| 154 | +; CHECK-NEXT: [[C_2:%.*]] = icmp ult i8 [[X]], 6 |
| 155 | +; CHECK-NEXT: [[RES_1:%.*]] = xor i1 [[C_1]], [[C_2]] |
| 156 | +; CHECK-NEXT: ret i1 [[RES_1]] |
| 157 | +; CHECK: exit.2: |
| 158 | +; CHECK-NEXT: [[C_3:%.*]] = icmp ult i8 [[X]], 7 |
| 159 | +; CHECK-NEXT: call void @use(i1 [[C_3]]) |
| 160 | +; CHECK-NEXT: [[C_4:%.*]] = icmp ult i8 [[X]], 6 |
| 161 | +; CHECK-NEXT: call void @use(i1 [[C_4]]) |
| 162 | +; CHECK-NEXT: [[C_5:%.*]] = icmp ult i8 [[X]], 11 |
| 163 | +; CHECK-NEXT: call void @use(i1 [[C_5]]) |
| 164 | +; CHECK-NEXT: [[C_6:%.*]] = icmp ult i8 [[X]], 10 |
| 165 | +; CHECK-NEXT: ret i1 [[C_6]] |
| 166 | +; |
| 167 | +entry: |
| 168 | + switch i8 %x, label %exit.1 [ |
| 169 | + i8 6, label %exit.2 |
| 170 | + i8 10, label %exit.2 |
| 171 | + ] |
| 172 | + |
| 173 | +exit.1: |
| 174 | + %c.1 = icmp ult i8 %x, 7 |
| 175 | + %c.2 = icmp ult i8 %x, 6 |
| 176 | + %res.1 = xor i1 %c.1, %c.2 |
| 177 | + ret i1 %res.1 |
| 178 | + |
| 179 | +exit.2: |
| 180 | + %c.3 = icmp ult i8 %x, 7 |
| 181 | + call void @use(i1 %c.3) |
| 182 | + %c.4 = icmp ult i8 %x, 6 |
| 183 | + call void @use(i1 %c.4) |
| 184 | + %c.5 = icmp ult i8 %x, 11 |
| 185 | + call void @use(i1 %c.5) |
| 186 | + %c.6 = icmp ult i8 %x, 10 |
| 187 | + ret i1 %c.6 |
| 188 | +} |
| 189 | + |
145 | 190 | declare void @use(i1)
|
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