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1 | 1 | !REQUIRES: amdgpu-registered-target, nvptx-registered-target
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2 | 2 | !RUN: %flang_fc1 -emit-fir -triple amdgcn-amd-amdhsa -target-cpu gfx908 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck --check-prefix=AMDGCN %s
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3 |
| -!RUN: %flang_fc1 -emit-hlfir -triple nvptx64-nvidia-cuda -target-cpu sm_80 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck --check-prefix=NVPTX %s |
4 |
| - |
| 3 | +!RUN: %flang_fc1 -emit-fir -triple nvptx64-nvidia-cuda -target-cpu sm_80 -fopenmp -fopenmp-is-target-device %s -o - | FileCheck --check-prefix=NVPTX %s |
5 | 4 |
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6 | 5 | !===============================================================================
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7 | 6 | ! Target_Enter Simple
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8 | 7 | !===============================================================================
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9 | 8 |
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10 |
| -!AMDGCN-LABEL: func.func @_QPomp_target_simple() attributes { |
11 |
| -!AMDGCN-SAME: target_cpu = "gfx908" |
12 |
| -!AMDGCN-SAME: target_features = #llvm.target_features<["+16-bit-insts", "+ci-insts", |
| 9 | +!AMDGCN: module attributes { |
| 10 | +!AMDGCN-SAME: fir.target_cpu = "gfx908" |
| 11 | +!AMDGCN-SAME: fir.target_features = #llvm.target_features<["+16-bit-insts", "+ci-insts", |
13 | 12 | !AMDGCN-SAME: "+dl-insts", "+dot1-insts", "+dot10-insts", "+dot2-insts", "+dot3-insts",
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14 | 13 | !AMDGCN-SAME: "+dot4-insts", "+dot5-insts", "+dot6-insts", "+dot7-insts", "+dpp",
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15 | 14 | !AMDGCN-SAME: "+gfx8-insts", "+gfx9-insts", "+gws", "+image-insts", "+mai-insts",
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16 | 15 | !AMDGCN-SAME: "+s-memrealtime", "+s-memtime-inst", "+wavefrontsize64"]>
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17 | 16 |
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18 |
| -!NVPTX-LABEL: func.func @_QPomp_target_simple() attributes { |
19 |
| -!NVPTX-SAME: target_cpu = "sm_80" |
20 |
| -!NVPTX-SAME: target_features = #llvm.target_features<["+ptx61", "+sm_80"]> |
21 |
| - |
22 |
| -subroutine omp_target_simple |
23 |
| - ! Directive needed to prevent subroutine from being filtered out when |
24 |
| - ! compiling for the device. |
25 |
| - !$omp declare target |
26 |
| -end subroutine omp_target_simple |
| 17 | +!NVPTX: module attributes { |
| 18 | +!NVPTX-SAME: fir.target_cpu = "sm_80" |
| 19 | +!NVPTX-SAME: fir.target_features = #llvm.target_features<["+ptx61", "+sm_80"]> |
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