@@ -34,11 +34,9 @@ class VEDAGToDAGISel : public SelectionDAGISel {
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const VESubtarget *Subtarget;
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public:
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- static char ID;
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-
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VEDAGToDAGISel () = delete ;
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- explicit VEDAGToDAGISel (VETargetMachine &tm) : SelectionDAGISel(ID, tm) {}
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+ explicit VEDAGToDAGISel (VETargetMachine &tm) : SelectionDAGISel(tm) {}
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bool runOnMachineFunction (MachineFunction &MF) override {
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Subtarget = &MF.getSubtarget <VESubtarget>();
@@ -70,11 +68,18 @@ class VEDAGToDAGISel : public SelectionDAGISel {
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bool matchADDRrr (SDValue N, SDValue &Base, SDValue &Index);
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bool matchADDRri (SDValue N, SDValue &Base, SDValue &Offset);
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};
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+
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+ class VEDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
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+ public:
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+ static char ID;
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+ explicit VEDAGToDAGISelLegacy (VETargetMachine &tm)
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+ : SelectionDAGISelLegacy(ID, std::make_unique<VEDAGToDAGISel>(tm)) {}
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+ };
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} // end anonymous namespace
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- char VEDAGToDAGISel ::ID = 0 ;
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+ char VEDAGToDAGISelLegacy ::ID = 0 ;
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- INITIALIZE_PASS (VEDAGToDAGISel , DEBUG_TYPE, PASS_NAME, false , false )
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+ INITIALIZE_PASS (VEDAGToDAGISelLegacy , DEBUG_TYPE, PASS_NAME, false , false )
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bool VEDAGToDAGISel::selectADDRrri(SDValue Addr, SDValue &Base, SDValue &Index,
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SDValue &Offset) {
@@ -336,5 +341,5 @@ SDNode *VEDAGToDAGISel::getGlobalBaseReg() {
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// / VE-specific DAG, ready for instruction scheduling.
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// /
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FunctionPass *llvm::createVEISelDag (VETargetMachine &TM) {
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- return new VEDAGToDAGISel (TM);
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+ return new VEDAGToDAGISelLegacy (TM);
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}
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