[SLP][NFC]Add a test for alternate vectorization in cmp instructions

with same/swapped predicate.

Author: alexey-bataev

llvm/test/Transforms/SLPVectorizer/X86/cmp-as-alternate-ops.ll

@@ -0,0 +1,43 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -slp-vectorizer -mcpu=skx -S -o - -mtriple=x86_64-unknown < %s | FileCheck %s
+
+define void @test(double* %0, double %1) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds double, double* [[TMP0:%.*]], i32 6
+; CHECK-NEXT:    [[TMP4:%.*]] = getelementptr inbounds double, double* [[TMP0]], i32 7
+; CHECK-NEXT:    br label [[TMP5:%.*]]
+; CHECK:       5:
+; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <2 x double> <double 0.000000e+00, double poison>, double [[TMP1:%.*]], i32 1
+; CHECK-NEXT:    br label [[TMP7:%.*]]
+; CHECK:       7:
+; CHECK-NEXT:    [[TMP8:%.*]] = load double, double* null, align 8
+; CHECK-NEXT:    [[TMP9:%.*]] = insertelement <2 x double> <double 0.000000e+00, double poison>, double [[TMP8]], i32 1
+; CHECK-NEXT:    [[TMP10:%.*]] = fcmp olt <2 x double> [[TMP6]], [[TMP9]]
+; CHECK-NEXT:    [[TMP11:%.*]] = select <2 x i1> [[TMP10]], <2 x double> zeroinitializer, <2 x double> zeroinitializer
+; CHECK-NEXT:    [[TMP12:%.*]] = fmul <2 x double> [[TMP11]], zeroinitializer
+; CHECK-NEXT:    [[TMP13:%.*]] = fadd <2 x double> zeroinitializer, [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = bitcast double* [[TMP3]] to <2 x double>*
+; CHECK-NEXT:    store <2 x double> [[TMP13]], <2 x double>* [[TMP14]], align 8
+; CHECK-NEXT:    br label [[TMP7]]
+;
+  %3 = getelementptr inbounds double, double* %0, i32 6
+  %4 = getelementptr inbounds double, double* %0, i32 7
+  br label %5
+
+5:                                                ; preds = %2
+  br label %6
+
+6:                                                ; preds = %6, %5
+  %7 = load double, double* null, align 8
+  %8 = fcmp olt double 0.000000e+00, 0.000000e+00
+  %9 = select i1 %8, double 0.000000e+00, double 0.000000e+00
+  %10 = fcmp ogt double %7, %1
+  %11 = select i1 %10, double 0.000000e+00, double 0.000000e+00
+  %12 = fmul double %9, 0.000000e+00
+  %13 = fmul double 0.000000e+00, %11
+  %14 = fadd double 0.000000e+00, %12
+  store double %14, double* %3, align 8
+  %15 = fadd double 0.000000e+00, %13
+  store double %15, double* %4, align 8
+  br label %6
+}