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phoebewangphoebewang
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Fix test fail
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‎llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll

Lines changed: 1 addition & 149 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
; RUN: opt < %s -mtriple=x86_64 -mattr=+cf -passes='simplifycfg<hoist-loads-stores-with-cond-faulting>' -simplifycfg-require-and-preserve-domtree=1 -disable-cload-cstore=0 -S | FileCheck %s --check-prefixes=CHECK,LOADSTORE
44
; RUN: opt < %s -mtriple=x86_64 -mattr=+cf -passes='simplifycfg<hoist-loads-stores-with-cond-faulting>' -simplifycfg-require-and-preserve-domtree=1 -disable-cload-cstore=1 -S | FileCheck %s --check-prefixes=CHECK,NONE,STOREONLY
55
; RUN: opt < %s -mtriple=x86_64 -mattr=+cf -passes='simplifycfg<hoist-loads-stores-with-cond-faulting>' -simplifycfg-require-and-preserve-domtree=1 -disable-cload-cstore=2 -S | FileCheck %s --check-prefixes=CHECK,NONE,LOADONLY
6-
; RUN: opt < %s -mtriple=x86_64 -mattr=+cf -passes='simplifycfg<hoist-loads-stores-with-cond-faulting>' -simplifycfg-require-and-preserve-domtree=1 -disable-cload-cstore=3 -S | FileCheck %s --check-prefixes=NONE,NONEONLY
6+
; RUN: opt < %s -mtriple=x86_64 -mattr=+cf -passes='simplifycfg<hoist-loads-stores-with-cond-faulting>' -simplifycfg-require-and-preserve-domtree=1 -disable-cload-cstore=3 -S | FileCheck %s --check-prefixes=CHECK,NONE,NONEONLY
77

88
;; Basic case: check masked.load/store is generated for i16/i32/i64.
99
define void @basic(i1 %cond, ptr %b, ptr %p, ptr %q) {
@@ -629,21 +629,6 @@ define void @threshold_7(i1 %cond, ptr %p1, ptr %p2, ptr %p3, ptr %p4, ptr %p5,
629629
; CHECK: if.false:
630630
; CHECK-NEXT: ret void
631631
;
632-
; NONE-LABEL: @threshold_7(
633-
; NONE-NEXT: entry:
634-
; NONE-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
635-
; NONE: if.true:
636-
; NONE-NEXT: store i32 1, ptr [[P1:%.*]], align 4
637-
; NONE-NEXT: store i32 2, ptr [[P2:%.*]], align 4
638-
; NONE-NEXT: store i32 3, ptr [[P3:%.*]], align 4
639-
; NONE-NEXT: store i32 4, ptr [[P4:%.*]], align 4
640-
; NONE-NEXT: store i32 5, ptr [[P5:%.*]], align 4
641-
; NONE-NEXT: store i32 6, ptr [[P6:%.*]], align 4
642-
; NONE-NEXT: store i32 7, ptr [[P7:%.*]], align 4
643-
; NONE-NEXT: br label [[IF_FALSE]]
644-
; NONE: if.false:
645-
; NONE-NEXT: ret void
646-
;
647632
entry:
648633
br i1 %cond, label %if.true, label %if.false
649634

@@ -683,26 +668,6 @@ define i32 @not_cheap_to_hoist(i32 %a, ptr %b, ptr %p, ptr %q, i32 %v0, i32 %v1,
683668
; CHECK-NEXT: store i32 [[TMP0]], ptr [[P]], align 4
684669
; CHECK-NEXT: br label [[COMMON_RET]]
685670
;
686-
; NONE-LABEL: @not_cheap_to_hoist(
687-
; NONE-NEXT: entry:
688-
; NONE-NEXT: [[COND:%.*]] = icmp eq i32 [[A:%.*]], 0
689-
; NONE-NEXT: br i1 [[COND]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
690-
; NONE: common.ret:
691-
; NONE-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ [[VVVV:%.*]], [[IF_FALSE]] ], [ 0, [[IF_TRUE]] ]
692-
; NONE-NEXT: ret i32 [[COMMON_RET_OP]]
693-
; NONE: if.false:
694-
; NONE-NEXT: store i64 1, ptr [[P:%.*]], align 8
695-
; NONE-NEXT: store i16 2, ptr [[Q:%.*]], align 2
696-
; NONE-NEXT: [[V:%.*]] = udiv i32 [[A]], 12345
697-
; NONE-NEXT: [[VV:%.*]] = mul i32 [[V]], [[V0:%.*]]
698-
; NONE-NEXT: [[VVV:%.*]] = mul i32 [[VV]], [[V1:%.*]]
699-
; NONE-NEXT: [[VVVV]] = select i1 [[CC:%.*]], i32 [[V2:%.*]], i32 [[VVV]]
700-
; NONE-NEXT: br label [[COMMON_RET:%.*]]
701-
; NONE: if.true:
702-
; NONE-NEXT: [[TMP0:%.*]] = load i32, ptr [[B:%.*]], align 4
703-
; NONE-NEXT: store i32 [[TMP0]], ptr [[P]], align 4
704-
; NONE-NEXT: br label [[COMMON_RET]]
705-
;
706671
entry:
707672
%cond = icmp eq i32 %a, 0
708673
br i1 %cond, label %if.true, label %if.false
@@ -739,17 +704,6 @@ define void @not_single_predecessor(ptr %p, ptr %q, i32 %a) {
739704
; CHECK-NEXT: store i32 [[TMP0]], ptr [[P:%.*]], align 4
740705
; CHECK-NEXT: br label [[IF_END]]
741706
;
742-
; NONE-LABEL: @not_single_predecessor(
743-
; NONE-NEXT: entry:
744-
; NONE-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[A:%.*]], 0
745-
; NONE-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
746-
; NONE: if.end:
747-
; NONE-NEXT: br label [[IF_THEN]]
748-
; NONE: if.then:
749-
; NONE-NEXT: [[TMP0:%.*]] = load i32, ptr [[Q:%.*]], align 4
750-
; NONE-NEXT: store i32 [[TMP0]], ptr [[P:%.*]], align 4
751-
; NONE-NEXT: br label [[IF_END]]
752-
;
753707
entry:
754708
%tobool = icmp ne i32 %a, 0
755709
br i1 %tobool, label %if.end, label %if.then
@@ -779,20 +733,6 @@ define void @not_supported_type(i8 %a, ptr %b, ptr %p, ptr %q) {
779733
; CHECK: if.end:
780734
; CHECK-NEXT: ret void
781735
;
782-
; NONE-LABEL: @not_supported_type(
783-
; NONE-NEXT: entry:
784-
; NONE-NEXT: [[COND:%.*]] = icmp eq i8 [[A:%.*]], 0
785-
; NONE-NEXT: br i1 [[COND]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
786-
; NONE: if.false:
787-
; NONE-NEXT: store i8 1, ptr [[Q:%.*]], align 1
788-
; NONE-NEXT: br label [[IF_END:%.*]]
789-
; NONE: if.true:
790-
; NONE-NEXT: [[TMP0:%.*]] = load i8, ptr [[B:%.*]], align 1
791-
; NONE-NEXT: store i8 [[TMP0]], ptr [[P:%.*]], align 1
792-
; NONE-NEXT: br label [[IF_END]]
793-
; NONE: if.end:
794-
; NONE-NEXT: ret void
795-
;
796736
entry:
797737
%cond = icmp eq i8 %a, 0
798738
br i1 %cond, label %if.true, label %if.false
@@ -828,22 +768,6 @@ define void @not_br_terminator(i32 %a, ptr %b, ptr %p, ptr %q) {
828768
; CHECK: if.end:
829769
; CHECK-NEXT: ret void
830770
;
831-
; NONE-LABEL: @not_br_terminator(
832-
; NONE-NEXT: entry:
833-
; NONE-NEXT: switch i32 [[A:%.*]], label [[IF_END:%.*]] [
834-
; NONE-NEXT: i32 1, label [[IF_FALSE:%.*]]
835-
; NONE-NEXT: i32 2, label [[IF_TRUE:%.*]]
836-
; NONE-NEXT: ]
837-
; NONE: if.false:
838-
; NONE-NEXT: store i32 1, ptr [[Q:%.*]], align 4
839-
; NONE-NEXT: br label [[IF_END]]
840-
; NONE: if.true:
841-
; NONE-NEXT: [[TMP0:%.*]] = load i32, ptr [[B:%.*]], align 4
842-
; NONE-NEXT: store i32 [[TMP0]], ptr [[P:%.*]], align 4
843-
; NONE-NEXT: br label [[IF_FALSE]]
844-
; NONE: if.end:
845-
; NONE-NEXT: ret void
846-
;
847771
entry:
848772
switch i32 %a, label %if.end [
849773
i32 1, label %if.false
@@ -874,15 +798,6 @@ define void @not_atomic(i1 %cond, ptr %p) {
874798
; CHECK: if.true:
875799
; CHECK-NEXT: ret void
876800
;
877-
; NONE-LABEL: @not_atomic(
878-
; NONE-NEXT: entry:
879-
; NONE-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
880-
; NONE: if.false:
881-
; NONE-NEXT: store atomic i32 1, ptr [[P:%.*]] seq_cst, align 4
882-
; NONE-NEXT: br label [[IF_TRUE]]
883-
; NONE: if.true:
884-
; NONE-NEXT: ret void
885-
;
886801
entry:
887802
br i1 %cond, label %if.true, label %if.false
888803

@@ -905,15 +820,6 @@ define void @not_volatile(i1 %cond, ptr %p) {
905820
; CHECK: if.true:
906821
; CHECK-NEXT: ret void
907822
;
908-
; NONE-LABEL: @not_volatile(
909-
; NONE-NEXT: entry:
910-
; NONE-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
911-
; NONE: if.false:
912-
; NONE-NEXT: [[TMP0:%.*]] = load volatile i32, ptr [[P:%.*]], align 4
913-
; NONE-NEXT: br label [[IF_TRUE]]
914-
; NONE: if.true:
915-
; NONE-NEXT: ret void
916-
;
917823
entry:
918824
br i1 %cond, label %if.true, label %if.false
919825

@@ -937,16 +843,6 @@ define void @not_hoistable_sideeffect(i1 %cond, ptr %p, ptr %q) {
937843
; CHECK: if.true:
938844
; CHECK-NEXT: ret void
939845
;
940-
; NONE-LABEL: @not_hoistable_sideeffect(
941-
; NONE-NEXT: entry:
942-
; NONE-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
943-
; NONE: if.false:
944-
; NONE-NEXT: [[RMW:%.*]] = atomicrmw xchg ptr [[Q:%.*]], double 4.000000e+00 seq_cst, align 8
945-
; NONE-NEXT: store i32 1, ptr [[P:%.*]], align 4
946-
; NONE-NEXT: br label [[IF_TRUE]]
947-
; NONE: if.true:
948-
; NONE-NEXT: ret void
949-
;
950846
entry:
951847
br i1 %cond, label %if.true, label %if.false
952848

@@ -1042,26 +938,6 @@ define void @not_alloca(ptr %p, ptr %q, i32 %a) {
1042938
; CHECK: if.end:
1043939
; CHECK-NEXT: ret void
1044940
;
1045-
; NONE-LABEL: @not_alloca(
1046-
; NONE-NEXT: entry:
1047-
; NONE-NEXT: [[P_ADDR:%.*]] = alloca ptr, align 8
1048-
; NONE-NEXT: [[Q_ADDR:%.*]] = alloca ptr, align 8
1049-
; NONE-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1050-
; NONE-NEXT: store ptr [[P:%.*]], ptr [[P_ADDR]], align 8
1051-
; NONE-NEXT: store ptr [[Q:%.*]], ptr [[Q_ADDR]], align 8
1052-
; NONE-NEXT: store i32 [[A:%.*]], ptr [[A_ADDR]], align 4
1053-
; NONE-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1054-
; NONE-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
1055-
; NONE-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
1056-
; NONE: if.then:
1057-
; NONE-NEXT: [[TMP1:%.*]] = load ptr, ptr [[Q_ADDR]], align 8
1058-
; NONE-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1059-
; NONE-NEXT: [[TMP3:%.*]] = load ptr, ptr [[P_ADDR]], align 8
1060-
; NONE-NEXT: store i32 [[TMP2]], ptr [[TMP3]], align 4
1061-
; NONE-NEXT: br label [[IF_END]]
1062-
; NONE: if.end:
1063-
; NONE-NEXT: ret void
1064-
;
1065941
entry:
1066942
%p.addr = alloca ptr
1067943
%q.addr = alloca ptr
@@ -1095,15 +971,6 @@ define void @not_maximum_alignment(i1 %cond, ptr %p) {
1095971
; CHECK: if.false:
1096972
; CHECK-NEXT: ret void
1097973
;
1098-
; NONE-LABEL: @not_maximum_alignment(
1099-
; NONE-NEXT: entry:
1100-
; NONE-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
1101-
; NONE: if.true:
1102-
; NONE-NEXT: store i32 0, ptr [[P:%.*]], align 4294967296
1103-
; NONE-NEXT: br label [[IF_FALSE]]
1104-
; NONE: if.false:
1105-
; NONE-NEXT: ret void
1106-
;
1107974
entry:
1108975
br i1 %cond, label %if.true, label %if.false
1109976

@@ -1284,21 +1151,6 @@ define i32 @not_multi_successors(i1 %c1, i32 %c2, ptr %p) {
12841151
; CHECK: sw.bb:
12851152
; CHECK-NEXT: br label [[COMMON_RET]]
12861153
;
1287-
; NONE-LABEL: @not_multi_successors(
1288-
; NONE-NEXT: entry:
1289-
; NONE-NEXT: br i1 [[C1:%.*]], label [[ENTRY_IF:%.*]], label [[COMMON_RET:%.*]]
1290-
; NONE: entry.if:
1291-
; NONE-NEXT: [[VAL:%.*]] = load i32, ptr [[P:%.*]], align 4
1292-
; NONE-NEXT: switch i32 [[C2:%.*]], label [[COMMON_RET]] [
1293-
; NONE-NEXT: i32 0, label [[SW_BB:%.*]]
1294-
; NONE-NEXT: i32 1, label [[SW_BB]]
1295-
; NONE-NEXT: ]
1296-
; NONE: common.ret:
1297-
; NONE-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[VAL]], [[ENTRY_IF]] ], [ 0, [[SW_BB]] ]
1298-
; NONE-NEXT: ret i32 [[COMMON_RET_OP]]
1299-
; NONE: sw.bb:
1300-
; NONE-NEXT: br label [[COMMON_RET]]
1301-
;
13021154
entry:
13031155
br i1 %c1, label %entry.if, label %entry.else
13041156

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