[LoopUnroll] Pre-commit test for loop unroll after folding branches in simplify cfg

Author: xiangzh1

llvm/test/Transforms/LoopUnroll/loop-branch-folding.ll

@@ -0,0 +1,194 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; RUN: opt < %s -S -passes=simplifycfg | FileCheck %s --check-prefixes=CHECK-CFG
+; RUN: opt < %s -S -passes=simplifycfg,loop-unroll --unroll-max-upperbound=17 | FileCheck %s --check-prefixes=CHECK-UNROLL
+
+define void @func(i32 noundef %Idx, ptr noundef %Arr, i32 noundef %Dims, ptr noundef %Out) {
+; CHECK-CFG-LABEL: define void @func(
+; CHECK-CFG-SAME: i32 noundef [[IDX:%.*]], ptr noundef [[ARR:%.*]], i32 noundef [[DIMS:%.*]], ptr noundef [[OUT:%.*]]) {
+; CHECK-CFG-NEXT:  entry:
+; CHECK-CFG-NEXT:    br label [[FOR_COND:%.*]]
+; CHECK-CFG:       for.cond:
+; CHECK-CFG-NEXT:    [[DIM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC16:%.*]], [[FOR_COND_CLEANUP6:%.*]] ]
+; CHECK-CFG-NEXT:    [[IDX_ADDR_0:%.*]] = phi i32 [ [[IDX]], [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_COND_CLEANUP6]] ]
+; CHECK-CFG-NEXT:    [[CMP:%.*]] = icmp sge i32 [[DIM_0]], 16
+; CHECK-CFG-NEXT:    [[CMP1:%.*]] = icmp eq i32 [[DIM_0]], [[DIMS]]
+; CHECK-CFG-NEXT:    [[OR_COND:%.*]] = or i1 [[CMP]], [[CMP1]]
+; CHECK-CFG-NEXT:    br i1 [[OR_COND]], label [[CLEANUP:%.*]], label [[IF_END:%.*]]
+; CHECK-CFG:       if.end:
+; CHECK-CFG-NEXT:    [[IDXPROM:%.*]] = sext i32 [[DIM_0]] to i64
+; CHECK-CFG-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[ARR]], i64 [[IDXPROM]]
+; CHECK-CFG-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
+; CHECK-CFG-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[IDX_ADDR_0]] to i64
+; CHECK-CFG-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[IDXPROM2]]
+; CHECK-CFG-NEXT:    [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX3]], align 4
+; CHECK-CFG-NEXT:    [[ADD]] = add nsw i32 [[TMP1]], 1
+; CHECK-CFG-NEXT:    br label [[FOR_COND4:%.*]]
+; CHECK-CFG:       for.cond4:
+; CHECK-CFG-NEXT:    [[ARG_0:%.*]] = phi i32 [ 0, [[IF_END]] ], [ [[INC:%.*]], [[FOR_BODY7:%.*]] ]
+; CHECK-CFG-NEXT:    [[CMP5:%.*]] = icmp slt i32 [[ARG_0]], 4
+; CHECK-CFG-NEXT:    br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6]]
+; CHECK-CFG:       for.cond.cleanup6:
+; CHECK-CFG-NEXT:    [[INC16]] = add nsw i32 [[DIM_0]], 1
+; CHECK-CFG-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-CFG:       for.body7:
+; CHECK-CFG-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
+; CHECK-CFG-NEXT:    [[IDXPROM10:%.*]] = sext i32 [[ARG_0]] to i64
+; CHECK-CFG-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM10]]
+; CHECK-CFG-NEXT:    [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX11]], align 4
+; CHECK-CFG-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[IDXPROM10]]
+; CHECK-CFG-NEXT:    [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX13]], align 4
+; CHECK-CFG-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP4]], [[TMP3]]
+; CHECK-CFG-NEXT:    store i32 [[ADD14]], ptr [[ARRAYIDX13]], align 4
+; CHECK-CFG-NEXT:    call void @_Z3barv()
+; CHECK-CFG-NEXT:    [[INC]] = add nsw i32 [[ARG_0]], 1
+; CHECK-CFG-NEXT:    br label [[FOR_COND4]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK-CFG:       cleanup:
+; CHECK-CFG-NEXT:    ret void
+;
+; CHECK-UNROLL-LABEL: define void @func(
+; CHECK-UNROLL-SAME: i32 noundef [[IDX:%.*]], ptr noundef [[ARR:%.*]], i32 noundef [[DIMS:%.*]], ptr noundef [[OUT:%.*]]) {
+; CHECK-UNROLL-NEXT:  entry:
+; CHECK-UNROLL-NEXT:    br label [[FOR_COND:%.*]]
+; CHECK-UNROLL:       for.cond:
+; CHECK-UNROLL-NEXT:    [[DIM_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC16:%.*]], [[FOR_COND_CLEANUP6:%.*]] ]
+; CHECK-UNROLL-NEXT:    [[IDX_ADDR_0:%.*]] = phi i32 [ [[IDX]], [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_COND_CLEANUP6]] ]
+; CHECK-UNROLL-NEXT:    [[CMP:%.*]] = icmp sge i32 [[DIM_0]], 16
+; CHECK-UNROLL-NEXT:    [[CMP1:%.*]] = icmp eq i32 [[DIM_0]], [[DIMS]]
+; CHECK-UNROLL-NEXT:    [[OR_COND:%.*]] = or i1 [[CMP]], [[CMP1]]
+; CHECK-UNROLL-NEXT:    br i1 [[OR_COND]], label [[CLEANUP:%.*]], label [[IF_END:%.*]]
+; CHECK-UNROLL:       if.end:
+; CHECK-UNROLL-NEXT:    [[IDXPROM:%.*]] = sext i32 [[DIM_0]] to i64
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[ARR]], i64 [[IDXPROM]]
+; CHECK-UNROLL-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
+; CHECK-UNROLL-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[IDX_ADDR_0]] to i64
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[IDXPROM2]]
+; CHECK-UNROLL-NEXT:    [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX3]], align 4
+; CHECK-UNROLL-NEXT:    [[ADD]] = add nsw i32 [[TMP1]], 1
+; CHECK-UNROLL-NEXT:    br label [[FOR_COND4:%.*]]
+; CHECK-UNROLL:       for.cond4:
+; CHECK-UNROLL-NEXT:    br label [[FOR_BODY7:%.*]]
+; CHECK-UNROLL:       for.cond.cleanup6:
+; CHECK-UNROLL-NEXT:    [[INC16]] = add nsw i32 [[DIM_0]], 1
+; CHECK-UNROLL-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-UNROLL:       for.body7:
+; CHECK-UNROLL-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
+; CHECK-UNROLL-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
+; CHECK-UNROLL-NEXT:    [[TMP4:%.*]] = load i32, ptr [[OUT]], align 4
+; CHECK-UNROLL-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP4]], [[TMP3]]
+; CHECK-UNROLL-NEXT:    store i32 [[ADD14]], ptr [[OUT]], align 4
+; CHECK-UNROLL-NEXT:    call void @_Z3barv()
+; CHECK-UNROLL-NEXT:    br label [[FOR_BODY7_1:%.*]]
+; CHECK-UNROLL:       for.body7.1:
+; CHECK-UNROLL-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX11_1:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i64 1
+; CHECK-UNROLL-NEXT:    [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX11_1]], align 4
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX13_1:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 1
+; CHECK-UNROLL-NEXT:    [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX13_1]], align 4
+; CHECK-UNROLL-NEXT:    [[ADD14_1:%.*]] = add nsw i32 [[TMP7]], [[TMP6]]
+; CHECK-UNROLL-NEXT:    store i32 [[ADD14_1]], ptr [[ARRAYIDX13_1]], align 4
+; CHECK-UNROLL-NEXT:    call void @_Z3barv()
+; CHECK-UNROLL-NEXT:    br label [[FOR_BODY7_2:%.*]]
+; CHECK-UNROLL:       for.body7.2:
+; CHECK-UNROLL-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX11_2:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i64 2
+; CHECK-UNROLL-NEXT:    [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX11_2]], align 4
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX13_2:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 2
+; CHECK-UNROLL-NEXT:    [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX13_2]], align 4
+; CHECK-UNROLL-NEXT:    [[ADD14_2:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
+; CHECK-UNROLL-NEXT:    store i32 [[ADD14_2]], ptr [[ARRAYIDX13_2]], align 4
+; CHECK-UNROLL-NEXT:    call void @_Z3barv()
+; CHECK-UNROLL-NEXT:    br label [[FOR_BODY7_3:%.*]]
+; CHECK-UNROLL:       for.body7.3:
+; CHECK-UNROLL-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX11_3:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i64 3
+; CHECK-UNROLL-NEXT:    [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX11_3]], align 4
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX13_3:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 3
+; CHECK-UNROLL-NEXT:    [[TMP13:%.*]] = load i32, ptr [[ARRAYIDX13_3]], align 4
+; CHECK-UNROLL-NEXT:    [[ADD14_3:%.*]] = add nsw i32 [[TMP13]], [[TMP12]]
+; CHECK-UNROLL-NEXT:    store i32 [[ADD14_3]], ptr [[ARRAYIDX13_3]], align 4
+; CHECK-UNROLL-NEXT:    call void @_Z3barv()
+; CHECK-UNROLL-NEXT:    br i1 false, label [[FOR_BODY7_4:%.*]], label [[FOR_COND_CLEANUP6]]
+; CHECK-UNROLL:       for.body7.4:
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX_LCSSA:%.*]] = phi ptr [ [[ARRAYIDX]], [[FOR_BODY7_3]] ]
+; CHECK-UNROLL-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[ARRAYIDX_LCSSA]], align 8
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX11_4:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i64 4
+; CHECK-UNROLL-NEXT:    [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX11_4]], align 4
+; CHECK-UNROLL-NEXT:    [[ARRAYIDX13_4:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 4
+; CHECK-UNROLL-NEXT:    [[TMP16:%.*]] = load i32, ptr [[ARRAYIDX13_4]], align 4
+; CHECK-UNROLL-NEXT:    [[ADD14_4:%.*]] = add nsw i32 [[TMP16]], [[TMP15]]
+; CHECK-UNROLL-NEXT:    store i32 [[ADD14_4]], ptr [[ARRAYIDX13_4]], align 4
+; CHECK-UNROLL-NEXT:    call void @_Z3barv()
+; CHECK-UNROLL-NEXT:    unreachable
+; CHECK-UNROLL:       cleanup:
+; CHECK-UNROLL-NEXT:    ret void
+;
+entry:
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.cond.cleanup6, %entry
+  %Dim.0 = phi i32 [ 0, %entry ], [ %inc16, %for.cond.cleanup6 ]
+  %Idx.addr.0 = phi i32 [ %Idx, %entry ], [ %add, %for.cond.cleanup6 ]
+  %cmp = icmp slt i32 %Dim.0, 16
+  br i1 %cmp, label %for.body, label %for.cond.cleanup
+
+for.cond.cleanup:                                 ; preds = %for.cond
+  br label %cleanup
+
+for.body:                                         ; preds = %for.cond
+  %cmp1 = icmp eq i32 %Dim.0, %Dims
+  br i1 %cmp1, label %if.then, label %if.end
+
+if.then:                                          ; preds = %for.body
+  br label %cleanup
+
+if.end:                                           ; preds = %for.body
+  %idxprom = sext i32 %Dim.0 to i64
+  %arrayidx = getelementptr inbounds ptr, ptr %Arr, i64 %idxprom
+  %0 = load ptr, ptr %arrayidx, align 8
+  %idxprom2 = sext i32 %Idx.addr.0 to i64
+  %arrayidx3 = getelementptr inbounds i32, ptr %0, i64 %idxprom2
+  %1 = load i32, ptr %arrayidx3, align 4
+  %add = add nsw i32 %1, 1
+  br label %for.cond4
+
+for.cond4:                                        ; preds = %for.body7, %if.end
+  %arg.0 = phi i32 [ 0, %if.end ], [ %inc, %for.body7 ]
+  %cmp5 = icmp slt i32 %arg.0, 4
+  br i1 %cmp5, label %for.body7, label %for.cond.cleanup6
+
+for.cond.cleanup6:                                ; preds = %for.cond4
+  %inc16 = add nsw i32 %Dim.0, 1
+  br label %for.cond, !llvm.loop !0
+
+for.body7:                                        ; preds = %for.cond4
+  %2 = load ptr, ptr %arrayidx, align 8
+  %idxprom10 = sext i32 %arg.0 to i64
+  %arrayidx11 = getelementptr inbounds i32, ptr %2, i64 %idxprom10
+  %3 = load i32, ptr %arrayidx11, align 4
+  %arrayidx13 = getelementptr inbounds i32, ptr %Out, i64 %idxprom10
+  %4 = load i32, ptr %arrayidx13, align 4
+  %add14 = add nsw i32 %4, %3
+  store i32 %add14, ptr %arrayidx13, align 4
+  call void @_Z3barv()
+  %inc = add nsw i32 %arg.0, 1
+  br label %for.cond4, !llvm.loop !3
+
+cleanup:                                          ; preds = %if.then, %for.cond.cleanup
+  ret void
+}
+
+  declare void @_Z3barv()
+
+!0 = distinct !{!0, !1, !2}
+!1 = !{!"llvm.loop.mustprogress"}
+!2 = !{!"llvm.loop.unroll.enable"}
+!3 = distinct !{!3, !1}
+; CHECK-CFG: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK-CFG: [[META1]] = !{!"llvm.loop.mustprogress"}
+; CHECK-CFG: [[META2]] = !{!"llvm.loop.unroll.enable"}
+; CHECK-CFG: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]}
+;.
+; CHECK-UNROLL: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK-UNROLL: [[META1]] = !{!"llvm.loop.mustprogress"}
+; CHECK-UNROLL: [[META2]] = !{!"llvm.loop.unroll.enable"}
+;.