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[WebAssembly] Recognise EXTEND_HIGH
When lowering EXTEND_VECTOR_INREG, check whether the operand is a shuffle that is moving the top half of a vector into the lower half. If so, we can EXTEND_HIGH the input to the shuffle instead.
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llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2143,6 +2143,35 @@ WebAssemblyTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op,
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Op.getOperand(1));
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}
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static SDValue GetHighToLowShuffleOperand(SDValue Op) {
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if (Op.getOpcode() != ISD::VECTOR_SHUFFLE)
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return SDValue();
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// Look for a shuffle which moves from the high half to the low half. We
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// can then use EXTEND_HIGH instead.
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auto IsHighToLow = [](ShuffleVectorSDNode *Shuffle) {
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ArrayRef<int> Mask = Shuffle->getMask();
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size_t BeginElement = Mask.size() / 2;
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for (size_t i = 0; i < Mask.size() / 2; ++i) {
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if (Mask[i] != static_cast<int>(BeginElement + i)) {
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return false;
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}
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}
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// The rest will be undef.
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for (size_t i = Mask.size() / 2; i < Mask.size(); ++i) {
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if (Mask[i] != -1) {
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return false;
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}
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}
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return true;
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};
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if (IsHighToLow(cast<ShuffleVectorSDNode>(Op.getNode()))) {
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return Op.getOperand(0);
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}
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return SDValue();
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}
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SDValue
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WebAssemblyTargetLowering::LowerEXTEND_VECTOR_INREG(SDValue Op,
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SelectionDAG &DAG) const {
@@ -2172,6 +2201,15 @@ WebAssemblyTargetLowering::LowerEXTEND_VECTOR_INREG(SDValue Op,
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break;
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}
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if (Scale == 2) {
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if (auto ShuffleIn = GetHighToLowShuffleOperand(Op.getOperand(0))) {
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unsigned Opc = Ext == WebAssemblyISD::EXTEND_LOW_S
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? WebAssemblyISD::EXTEND_HIGH_S
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: WebAssemblyISD::EXTEND_HIGH_U;
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return DAG.getNode(Opc, DL, VT, ShuffleIn);
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}
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}
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SDValue Ret = Src;
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while (Scale != 1) {
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Ret = DAG.getNode(Ext, DL,

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