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[LowerTypeTests] Add loongarch64 to CFI jumptables (#67312)
This patch implements jump tables for loongarch64.
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+19
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llvm/lib/Transforms/IPO/LowerTypeTests.cpp

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1200,6 +1200,7 @@ static const unsigned kARMJumpTableEntrySize = 4;
12001200
static const unsigned kARMBTIJumpTableEntrySize = 8;
12011201
static const unsigned kARMv6MJumpTableEntrySize = 16;
12021202
static const unsigned kRISCVJumpTableEntrySize = 8;
1203+
static const unsigned kLOONGARCH64JumpTableEntrySize = 8;
12031204

12041205
bool LowerTypeTestsModule::hasBranchTargetEnforcement() {
12051206
if (HasBranchTargetEnforcement == -1) {
@@ -1240,6 +1241,8 @@ unsigned LowerTypeTestsModule::getJumpTableEntrySize() {
12401241
case Triple::riscv32:
12411242
case Triple::riscv64:
12421243
return kRISCVJumpTableEntrySize;
1244+
case Triple::loongarch64:
1245+
return kLOONGARCH64JumpTableEntrySize;
12431246
default:
12441247
report_fatal_error("Unsupported architecture for jump tables");
12451248
}
@@ -1304,6 +1307,9 @@ void LowerTypeTestsModule::createJumpTableEntry(
13041307
} else if (JumpTableArch == Triple::riscv32 ||
13051308
JumpTableArch == Triple::riscv64) {
13061309
AsmOS << "tail $" << ArgIndex << "@plt\n";
1310+
} else if (JumpTableArch == Triple::loongarch64) {
1311+
AsmOS << "pcalau12i $$t0, %pc_hi20($" << ArgIndex << ")\n"
1312+
<< "jirl $$r0, $$t0, %pc_lo12($" << ArgIndex << ")\n";
13071313
} else {
13081314
report_fatal_error("Unsupported architecture for jump tables");
13091315
}
@@ -1322,7 +1328,8 @@ void LowerTypeTestsModule::buildBitSetsFromFunctions(
13221328
ArrayRef<Metadata *> TypeIds, ArrayRef<GlobalTypeMember *> Functions) {
13231329
if (Arch == Triple::x86 || Arch == Triple::x86_64 || Arch == Triple::arm ||
13241330
Arch == Triple::thumb || Arch == Triple::aarch64 ||
1325-
Arch == Triple::riscv32 || Arch == Triple::riscv64)
1331+
Arch == Triple::riscv32 || Arch == Triple::riscv64 ||
1332+
Arch == Triple::loongarch64)
13261333
buildBitSetsFromFunctionsNative(TypeIds, Functions);
13271334
else if (Arch == Triple::wasm32 || Arch == Triple::wasm64)
13281335
buildBitSetsFromFunctionsWASM(TypeIds, Functions);

llvm/test/Transforms/LowerTypeTests/function-weak.ll

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
; RUN: opt -S -passes=lowertypetests -mtriple=aarch64-unknown-linux-gnu %s | FileCheck --check-prefixes=CHECK,ARM %s
55
; RUN: opt -S -passes=lowertypetests -mtriple=riscv32-unknown-linux-gnu %s | FileCheck --check-prefixes=CHECK,RISCV %s
66
; RUN: opt -S -passes=lowertypetests -mtriple=riscv64-unknown-linux-gnu %s | FileCheck --check-prefixes=CHECK,RISCV %s
7+
; RUN: opt -S -passes=lowertypetests -mtriple=loongarch64-unknown-linux-gnu %s | FileCheck --check-prefixes=CHECK,LOONGARCH64 %s
78

89
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
910
target triple = "x86_64-unknown-linux-gnu"
@@ -116,6 +117,7 @@ define i1 @foo(ptr %p) {
116117
; X86: define private void @[[JT]]() #{{.*}} align 8 {
117118
; ARM: define private void @[[JT]]() #{{.*}} align 4 {
118119
; RISCV: define private void @[[JT]]() #{{.*}} align 8 {
120+
; LOONGARCH64: define private void @[[JT]]() #{{.*}} align 8 {
119121

120122
; CHECK: define internal void @__cfi_global_var_init() section ".text.startup" {
121123
; CHECK-NEXT: entry:

llvm/test/Transforms/LowerTypeTests/function.ll

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
; RUN: opt -S -passes=lowertypetests -mtriple=riscv32-unknown-linux-gnu %s | FileCheck --check-prefixes=RISCV,NATIVE %s
66
; RUN: opt -S -passes=lowertypetests -mtriple=riscv64-unknown-linux-gnu %s | FileCheck --check-prefixes=RISCV,NATIVE %s
77
; RUN: opt -S -passes=lowertypetests -mtriple=wasm32-unknown-unknown %s | FileCheck --check-prefix=WASM32 %s
8+
; RUN: opt -S -passes=lowertypetests -mtriple=loongarch64-unknown-linux-gnu %s | FileCheck --check-prefixes=LOONGARCH64,NATIVE %s
89

910
; The right format for Arm jump tables depends on the selected
1011
; subtarget, so we can't get these tests right without the Arm target
@@ -34,6 +35,7 @@ target datalayout = "e-p:64:64"
3435
; THUMB: @g = internal alias void (), getelementptr inbounds ([2 x [4 x i8]], ptr @[[JT]], i64 0, i64 1)
3536
; THUMBV6M: @g = internal alias void (), getelementptr inbounds ([2 x [16 x i8]], ptr @[[JT]], i64 0, i64 1)
3637
; RISCV: @g = internal alias void (), getelementptr inbounds ([2 x [8 x i8]], ptr @[[JT]], i64 0, i64 1)
38+
; LOONGARCH64: @g = internal alias void (), getelementptr inbounds ([2 x [8 x i8]], ptr @[[JT]], i64 0, i64 1)
3739

3840
; NATIVE: define hidden void @f.cfi()
3941
; WASM32: define void @f() !type !{{[0-9]+}} !wasm.index ![[I0:[0-9]+]]
@@ -65,6 +67,7 @@ define i1 @foo(ptr %p) {
6567
; THUMB: define private void @[[JT]]() #[[ATTR:.*]] align 4 {
6668
; THUMBV6M: define private void @[[JT]]() #[[ATTR:.*]] align 16 {
6769
; RISCV: define private void @[[JT]]() #[[ATTR:.*]] align 8 {
70+
; LOONGARCH64: define private void @[[JT]]() #[[ATTR:.*]] align 8 {
6871

6972
; X86: jmp ${0:c}@plt
7073
; X86-SAME: int3
@@ -99,6 +102,11 @@ define i1 @foo(ptr %p) {
99102
; RISCV: tail $0@plt
100103
; RISCV-SAME: tail $1@plt
101104

105+
; LOONGARCH64: pcalau12i $$t0, %pc_hi20($0)
106+
; LOONGARCH64-SAME: jirl $$r0, $$t0, %pc_lo12($0)
107+
; LOONGARCH64-SAME: pcalau12i $$t0, %pc_hi20($1)
108+
; LOONGARCH64-SAME: jirl $$r0, $$t0, %pc_lo12($1)
109+
102110
; NATIVE-SAME: "s,s"(ptr @f.cfi, ptr @g.cfi)
103111

104112
; X86-LINUX: attributes #[[ATTR]] = { naked nocf_check nounwind }
@@ -107,6 +115,7 @@ define i1 @foo(ptr %p) {
107115
; THUMB: attributes #[[ATTR]] = { naked nounwind "branch-target-enforcement"="false" "sign-return-address"="none" "target-cpu"="cortex-a8" "target-features"="+thumb-mode" }
108116
; THUMBV6M: attributes #[[ATTR]] = { naked nounwind "branch-target-enforcement"="false" "sign-return-address"="none" "target-features"="+thumb-mode" }
109117
; RISCV: attributes #[[ATTR]] = { naked nounwind "target-features"="-c,-relax" }
118+
; LOONGARCH64: attributes #[[ATTR]] = { naked nounwind }
110119

111120
; WASM32: ![[I0]] = !{i64 1}
112121
; WASM32: ![[I1]] = !{i64 2}

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