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[LAA] Add tests with various early exits.
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes='print<access-info>' -disable-output %s 2>&1 | FileCheck %s
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define void @all_exits_dominate_latch_countable_exits_at_most_500_iterations(ptr %A, ptr %B) {
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; CHECK-LABEL: 'all_exits_dominate_latch_countable_exits_at_most_500_iterations'
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; CHECK-NEXT: loop.header:
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; CHECK-NEXT: Report: could not determine number of loop iterations
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; CHECK-NEXT: Dependences:
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; CHECK-NEXT: Run-time memory checks:
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; CHECK-NEXT: Grouped accesses:
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; CHECK-EMPTY:
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; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
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; CHECK-NEXT: SCEV assumptions:
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; CHECK-EMPTY:
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; CHECK-NEXT: Expressions re-written:
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
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%gep.A = getelementptr inbounds i32, ptr %A, i64 %iv
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%gep.B = getelementptr inbounds i32, ptr %B, i64 %iv
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%l = load i32, ptr %gep.A, align 4
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store i32 0, ptr %gep.B, align 4
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%cntable.c.1 = icmp ult i64 %iv, 1000
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%iv.next = add nuw nsw i64 %iv, 1
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br i1 %cntable.c.1, label %b2, label %e.1
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b2:
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%uncntable.c.0 = icmp eq i32 %l, 0
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br i1 %uncntable.c.0, label %e.2, label %b3
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b3:
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%cntable.c.2 = icmp eq i64 %iv.next, 500
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br i1 %cntable.c.2, label %cleanup4, label %latch
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latch:
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br label %loop.header
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cleanup4:
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ret void
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e.1:
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ret void
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e.2:
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ret void
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}
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define i32 @all_exits_dominate_latch_countable_exits_at_most_1000_iterations(ptr %A, ptr %B) {
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; CHECK-LABEL: 'all_exits_dominate_latch_countable_exits_at_most_1000_iterations'
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; CHECK-NEXT: loop.header:
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; CHECK-NEXT: Report: could not determine number of loop iterations
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; CHECK-NEXT: Dependences:
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; CHECK-NEXT: Run-time memory checks:
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; CHECK-NEXT: Grouped accesses:
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; CHECK-EMPTY:
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; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
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; CHECK-NEXT: SCEV assumptions:
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; CHECK-EMPTY:
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; CHECK-NEXT: Expressions re-written:
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
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%gep.A = getelementptr inbounds i32, ptr %A, i64 %iv
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%gep.B = getelementptr inbounds i32, ptr %B, i64 %iv
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%l = load i32, ptr %gep.A, align 4
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store i32 0, ptr %gep.B, align 4
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%cntable.c.1 = icmp ult i64 %iv, 1000
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br i1 %cntable.c.1, label %b2, label %e.1
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b2:
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%uncntable.c.0 = icmp eq i32 %l, 0
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br i1 %uncntable.c.0, label %e.2, label %b3
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b3:
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%iv.next = add nuw nsw i64 %iv, 1
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%cntable.c.2 = icmp eq i64 %iv.next, 2000
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br i1 %cntable.c.2, label %e.0, label %latch
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latch:
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br label %loop.header
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e.0:
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ret i32 0
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e.1:
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ret i32 1
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e.2:
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ret i32 2
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}
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define i32 @not_all_exits_dominate_latch(ptr %A, ptr %B) {
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; CHECK-LABEL: 'not_all_exits_dominate_latch'
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; CHECK-NEXT: loop.header:
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; CHECK-NEXT: Report: could not determine number of loop iterations
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; CHECK-NEXT: Dependences:
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; CHECK-NEXT: Run-time memory checks:
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; CHECK-NEXT: Grouped accesses:
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; CHECK-EMPTY:
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; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
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; CHECK-NEXT: SCEV assumptions:
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; CHECK-EMPTY:
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; CHECK-NEXT: Expressions re-written:
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
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%gep.A = getelementptr inbounds i32, ptr %A, i64 %iv
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%gep.B = getelementptr inbounds i32, ptr %B, i64 %iv
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%l = load i32, ptr %gep.A, align 4
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store i32 0, ptr %gep.B, align 4
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%cntable.c.1 = icmp ult i64 %iv, 1000
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%iv.next = add nuw nsw i64 %iv, 1
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br i1 %cntable.c.1, label %b2, label %latch
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b2:
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%uncntable.c.0 = icmp eq i32 %l, 0
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br i1 %uncntable.c.0, label %e.2, label %b3
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b3:
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%cntable.c.2 = icmp eq i64 %iv.next, 2000
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br i1 %cntable.c.2, label %e.0, label %latch
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latch:
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br label %loop.header
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e.0:
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ret i32 0
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e.2:
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ret i32 1
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}
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define i32 @b3_does_not_dominate_latch(ptr %A, ptr %B) {
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; CHECK-LABEL: 'b3_does_not_dominate_latch'
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; CHECK-NEXT: loop.header:
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; CHECK-NEXT: Report: could not determine number of loop iterations
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; CHECK-NEXT: Dependences:
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; CHECK-NEXT: Run-time memory checks:
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; CHECK-NEXT: Grouped accesses:
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; CHECK-EMPTY:
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; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
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; CHECK-NEXT: SCEV assumptions:
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; CHECK-EMPTY:
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; CHECK-NEXT: Expressions re-written:
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
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%gep.A = getelementptr inbounds i32, ptr %A, i64 %iv
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%gep.B = getelementptr inbounds i32, ptr %B, i64 %iv
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%l = load i32, ptr %gep.A, align 4
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store i32 0, ptr %gep.B, align 4
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%cntable.c.1 = icmp ult i64 %iv, 1000
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%iv.next = add nuw nsw i64 %iv, 1
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br i1 %cntable.c.1, label %b2, label %e.1
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b2:
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%uncntable.c.0 = icmp eq i32 %l, 0
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br i1 %uncntable.c.0, label %latch, label %b3
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b3:
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%cntable.c.2 = icmp eq i64 %iv.next, 500
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br i1 %cntable.c.2, label %e.0, label %latch
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latch:
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br label %loop.header
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e.0:
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ret i32 0
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e.1:
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ret i32 1
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}

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