|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -passes='print<access-info>' -disable-output %s 2>&1 | FileCheck %s |
| 3 | + |
| 4 | +define void @all_exits_dominate_latch_countable_exits_at_most_500_iterations(ptr %A, ptr %B) { |
| 5 | +; CHECK-LABEL: 'all_exits_dominate_latch_countable_exits_at_most_500_iterations' |
| 6 | +; CHECK-NEXT: loop.header: |
| 7 | +; CHECK-NEXT: Report: could not determine number of loop iterations |
| 8 | +; CHECK-NEXT: Dependences: |
| 9 | +; CHECK-NEXT: Run-time memory checks: |
| 10 | +; CHECK-NEXT: Grouped accesses: |
| 11 | +; CHECK-EMPTY: |
| 12 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 13 | +; CHECK-NEXT: SCEV assumptions: |
| 14 | +; CHECK-EMPTY: |
| 15 | +; CHECK-NEXT: Expressions re-written: |
| 16 | +; |
| 17 | +entry: |
| 18 | + br label %loop.header |
| 19 | + |
| 20 | +loop.header: |
| 21 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ] |
| 22 | + %gep.A = getelementptr inbounds i32, ptr %A, i64 %iv |
| 23 | + %gep.B = getelementptr inbounds i32, ptr %B, i64 %iv |
| 24 | + %l = load i32, ptr %gep.A, align 4 |
| 25 | + store i32 0, ptr %gep.B, align 4 |
| 26 | + %cntable.c.1 = icmp ult i64 %iv, 1000 |
| 27 | + %iv.next = add nuw nsw i64 %iv, 1 |
| 28 | + br i1 %cntable.c.1, label %b2, label %e.1 |
| 29 | + |
| 30 | +b2: |
| 31 | + %uncntable.c.0 = icmp eq i32 %l, 0 |
| 32 | + br i1 %uncntable.c.0, label %e.2, label %b3 |
| 33 | + |
| 34 | +b3: |
| 35 | + %cntable.c.2 = icmp eq i64 %iv.next, 500 |
| 36 | + br i1 %cntable.c.2, label %cleanup4, label %latch |
| 37 | + |
| 38 | +latch: |
| 39 | + br label %loop.header |
| 40 | + |
| 41 | +cleanup4: |
| 42 | + ret void |
| 43 | + |
| 44 | +e.1: |
| 45 | + ret void |
| 46 | +e.2: |
| 47 | + ret void |
| 48 | + |
| 49 | +} |
| 50 | + |
| 51 | + |
| 52 | + |
| 53 | +define i32 @all_exits_dominate_latch_countable_exits_at_most_1000_iterations(ptr %A, ptr %B) { |
| 54 | +; CHECK-LABEL: 'all_exits_dominate_latch_countable_exits_at_most_1000_iterations' |
| 55 | +; CHECK-NEXT: loop.header: |
| 56 | +; CHECK-NEXT: Report: could not determine number of loop iterations |
| 57 | +; CHECK-NEXT: Dependences: |
| 58 | +; CHECK-NEXT: Run-time memory checks: |
| 59 | +; CHECK-NEXT: Grouped accesses: |
| 60 | +; CHECK-EMPTY: |
| 61 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 62 | +; CHECK-NEXT: SCEV assumptions: |
| 63 | +; CHECK-EMPTY: |
| 64 | +; CHECK-NEXT: Expressions re-written: |
| 65 | +; |
| 66 | +entry: |
| 67 | + br label %loop.header |
| 68 | + |
| 69 | +loop.header: |
| 70 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ] |
| 71 | + %gep.A = getelementptr inbounds i32, ptr %A, i64 %iv |
| 72 | + %gep.B = getelementptr inbounds i32, ptr %B, i64 %iv |
| 73 | + %l = load i32, ptr %gep.A, align 4 |
| 74 | + store i32 0, ptr %gep.B, align 4 |
| 75 | + %cntable.c.1 = icmp ult i64 %iv, 1000 |
| 76 | + br i1 %cntable.c.1, label %b2, label %e.1 |
| 77 | + |
| 78 | +b2: |
| 79 | + %uncntable.c.0 = icmp eq i32 %l, 0 |
| 80 | + br i1 %uncntable.c.0, label %e.2, label %b3 |
| 81 | + |
| 82 | +b3: |
| 83 | + %iv.next = add nuw nsw i64 %iv, 1 |
| 84 | + %cntable.c.2 = icmp eq i64 %iv.next, 2000 |
| 85 | + br i1 %cntable.c.2, label %e.0, label %latch |
| 86 | + |
| 87 | +latch: |
| 88 | + br label %loop.header |
| 89 | + |
| 90 | +e.0: |
| 91 | + ret i32 0 |
| 92 | + |
| 93 | +e.1: |
| 94 | + ret i32 1 |
| 95 | + |
| 96 | +e.2: |
| 97 | + ret i32 2 |
| 98 | +} |
| 99 | + |
| 100 | + |
| 101 | +define i32 @not_all_exits_dominate_latch(ptr %A, ptr %B) { |
| 102 | +; CHECK-LABEL: 'not_all_exits_dominate_latch' |
| 103 | +; CHECK-NEXT: loop.header: |
| 104 | +; CHECK-NEXT: Report: could not determine number of loop iterations |
| 105 | +; CHECK-NEXT: Dependences: |
| 106 | +; CHECK-NEXT: Run-time memory checks: |
| 107 | +; CHECK-NEXT: Grouped accesses: |
| 108 | +; CHECK-EMPTY: |
| 109 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 110 | +; CHECK-NEXT: SCEV assumptions: |
| 111 | +; CHECK-EMPTY: |
| 112 | +; CHECK-NEXT: Expressions re-written: |
| 113 | +; |
| 114 | +entry: |
| 115 | + br label %loop.header |
| 116 | + |
| 117 | +loop.header: |
| 118 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ] |
| 119 | + %gep.A = getelementptr inbounds i32, ptr %A, i64 %iv |
| 120 | + %gep.B = getelementptr inbounds i32, ptr %B, i64 %iv |
| 121 | + %l = load i32, ptr %gep.A, align 4 |
| 122 | + store i32 0, ptr %gep.B, align 4 |
| 123 | + %cntable.c.1 = icmp ult i64 %iv, 1000 |
| 124 | + %iv.next = add nuw nsw i64 %iv, 1 |
| 125 | + br i1 %cntable.c.1, label %b2, label %latch |
| 126 | + |
| 127 | +b2: |
| 128 | + %uncntable.c.0 = icmp eq i32 %l, 0 |
| 129 | + br i1 %uncntable.c.0, label %e.2, label %b3 |
| 130 | + |
| 131 | +b3: |
| 132 | + %cntable.c.2 = icmp eq i64 %iv.next, 2000 |
| 133 | + br i1 %cntable.c.2, label %e.0, label %latch |
| 134 | + |
| 135 | +latch: |
| 136 | + br label %loop.header |
| 137 | + |
| 138 | +e.0: |
| 139 | + ret i32 0 |
| 140 | + |
| 141 | +e.2: |
| 142 | + ret i32 1 |
| 143 | +} |
| 144 | + |
| 145 | +define i32 @b3_does_not_dominate_latch(ptr %A, ptr %B) { |
| 146 | +; CHECK-LABEL: 'b3_does_not_dominate_latch' |
| 147 | +; CHECK-NEXT: loop.header: |
| 148 | +; CHECK-NEXT: Report: could not determine number of loop iterations |
| 149 | +; CHECK-NEXT: Dependences: |
| 150 | +; CHECK-NEXT: Run-time memory checks: |
| 151 | +; CHECK-NEXT: Grouped accesses: |
| 152 | +; CHECK-EMPTY: |
| 153 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 154 | +; CHECK-NEXT: SCEV assumptions: |
| 155 | +; CHECK-EMPTY: |
| 156 | +; CHECK-NEXT: Expressions re-written: |
| 157 | +; |
| 158 | +entry: |
| 159 | + br label %loop.header |
| 160 | + |
| 161 | +loop.header: |
| 162 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ] |
| 163 | + %gep.A = getelementptr inbounds i32, ptr %A, i64 %iv |
| 164 | + %gep.B = getelementptr inbounds i32, ptr %B, i64 %iv |
| 165 | + %l = load i32, ptr %gep.A, align 4 |
| 166 | + store i32 0, ptr %gep.B, align 4 |
| 167 | + %cntable.c.1 = icmp ult i64 %iv, 1000 |
| 168 | + %iv.next = add nuw nsw i64 %iv, 1 |
| 169 | + br i1 %cntable.c.1, label %b2, label %e.1 |
| 170 | + |
| 171 | +b2: |
| 172 | + %uncntable.c.0 = icmp eq i32 %l, 0 |
| 173 | + br i1 %uncntable.c.0, label %latch, label %b3 |
| 174 | + |
| 175 | +b3: |
| 176 | + %cntable.c.2 = icmp eq i64 %iv.next, 500 |
| 177 | + br i1 %cntable.c.2, label %e.0, label %latch |
| 178 | + |
| 179 | +latch: |
| 180 | + br label %loop.header |
| 181 | + |
| 182 | +e.0: |
| 183 | + ret i32 0 |
| 184 | + |
| 185 | +e.1: |
| 186 | + ret i32 1 |
| 187 | +} |
0 commit comments