@@ -669,8 +669,6 @@ class VgprMAIFrag<SDPatternOperator Op> : MAIFrag<Op, MayNotNeedAGPRs> {
669
669
let GISelPredicateCode = MayNotNeedAGPRs_gisel;
670
670
}
671
671
672
- let SubtargetPredicate = HasMAIInsts in {
673
-
674
672
let isAsCheapAsAMove = 1, isReMaterializable = 1 in {
675
673
defm V_ACCVGPR_READ_B32 : VOP3Inst<"v_accvgpr_read_b32", VOPProfileAccRead>;
676
674
let isMoveImm = 1 in {
@@ -680,6 +678,7 @@ let isAsCheapAsAMove = 1, isReMaterializable = 1 in {
680
678
681
679
class MAIInst<string OpName, VOPProfile P, SDPatternOperator node>
682
680
: VOP3InstBase<OpName, P, node> {
681
+ let SubtargetPredicate = HasMAIInsts;
683
682
Instruction Opcode = !cast<Instruction>(NAME);
684
683
bit is_dgemm = 0;
685
684
bit is_gfx940_xdl = 0;
@@ -695,7 +694,7 @@ multiclass MAIInst<string OpName, string P, SDPatternOperator node> {
695
694
!if(!or(NoDstOverlap, !eq(node, null_frag)), null_frag, AgprMAIFrag<node>)>,
696
695
MFMATable<0, NAME # "_e64">;
697
696
698
- let SubtargetPredicate = isGFX90APlus, Mnemonic = OpName in
697
+ let OtherPredicates = [ isGFX90APlus] , Mnemonic = OpName in
699
698
def _vgprcd_e64 : MAIInst<OpName # "_vgprcd", !cast<VOPProfileMAI>("VOPProfileMAI_" # P # "_VCD"),
700
699
!if(!or(NoDstOverlap, !eq(node, null_frag)), null_frag, VgprMAIFrag<node>)>,
701
700
MFMATable<0, NAME # "_vgprcd_e64">;
@@ -709,7 +708,7 @@ multiclass MAIInst<string OpName, string P, SDPatternOperator node> {
709
708
!if(!eq(node, null_frag), null_frag, AgprMAIFrag<node>)>,
710
709
MFMATable<1, NAME # "_e64">;
711
710
712
- let SubtargetPredicate = isGFX90APlus in
711
+ let OtherPredicates = [ isGFX90APlus] in
713
712
def _mac_vgprcd_e64 : MAIInst<OpName # "_mac_vgprcd", !cast<VOPProfileMAI>("VOPProfileMAI_" # P # "_VCD"),
714
713
!if(!eq(node, null_frag), null_frag, VgprMAIFrag<node>)>,
715
714
MFMATable<1, NAME # "_vgprcd_e64">;
@@ -735,7 +734,7 @@ defm V_MFMA_F32_32X32X8F16 : MAIInst<"v_mfma_f32_32x32x8f16", "F32_V4F16_X16",
735
734
defm V_MFMA_I32_32X32X4I8 : MAIInst<"v_mfma_i32_32x32x4i8", "I32_I32_X32", int_amdgcn_mfma_i32_32x32x4i8>;
736
735
}
737
736
738
- let Predicates = [ isGFX908orGFX90A] in {
737
+ let SubtargetPredicate = isGFX908orGFX90A in {
739
738
defm V_MFMA_I32_16X16X16I8 : MAIInst<"v_mfma_i32_16x16x16i8", "I32_I32_X4", int_amdgcn_mfma_i32_16x16x16i8>;
740
739
defm V_MFMA_I32_32X32X8I8 : MAIInst<"v_mfma_i32_32x32x8i8", "I32_I32_X16", int_amdgcn_mfma_i32_32x32x8i8>;
741
740
defm V_MFMA_F32_4X4X2BF16 : MAIInst<"v_mfma_f32_4x4x2bf16", "F32_V2I16_X4", int_amdgcn_mfma_f32_4x4x2bf16>;
@@ -745,15 +744,13 @@ defm V_MFMA_F32_32X32X2BF16 : MAIInst<"v_mfma_f32_32x32x2bf16", "F32_V2I16_X32",
745
744
defm V_MFMA_F32_32X32X4BF16 : MAIInst<"v_mfma_f32_32x32x4bf16", "F32_V2I16_X16", int_amdgcn_mfma_f32_32x32x4bf16>;
746
745
}
747
746
748
- } // End SubtargetPredicate = HasMAIInsts
749
-
750
747
let SubtargetPredicate = HasGFX950Insts, is_gfx940_xdl = 1 in {
751
748
defm V_MFMA_F32_16X16X32_F16 : MAIInst<"v_mfma_f32_16x16x32f16", "F32_V8F16_X32", int_amdgcn_mfma_f32_16x16x32_f16>;
752
749
defm V_MFMA_F32_32X32X16_F16 : MAIInst<"v_mfma_f32_32x32x16f16", "F32_V8F16_X16", int_amdgcn_mfma_f32_32x32x16_f16>;
753
750
defm V_MFMA_F32_32X32X16_BF16 : MAIInst<"v_mfma_f32_32x32x16bf16", "F32_V8BF16_X16", int_amdgcn_mfma_f32_32x32x16_bf16>;
754
751
}
755
752
756
- let Predicates = [ isGFX90APlus] in {
753
+ let SubtargetPredicate = isGFX90APlus in {
757
754
let is_gfx940_xdl = 1 in {
758
755
defm V_MFMA_F32_32X32X4BF16_1K : MAIInst<"v_mfma_f32_32x32x4bf16_1k", "F32_V4I16_X32", int_amdgcn_mfma_f32_32x32x4bf16_1k>;
759
756
defm V_MFMA_F32_16X16X4BF16_1K : MAIInst<"v_mfma_f32_16x16x4bf16_1k", "F32_V4I16_X16", int_amdgcn_mfma_f32_16x16x4bf16_1k>;
@@ -766,7 +763,7 @@ let Predicates = [isGFX90APlus] in {
766
763
defm V_MFMA_F64_16X16X4F64 : MAIInst<"v_mfma_f64_16x16x4f64", "F64_16X16X4F64", int_amdgcn_mfma_f64_16x16x4f64>;
767
764
defm V_MFMA_F64_4X4X4F64 : MAIInst<"v_mfma_f64_4x4x4f64", "F64_4X4X4F64", int_amdgcn_mfma_f64_4x4x4f64>;
768
765
}
769
- } // End Predicates = [ isGFX90APlus]
766
+ } // End SubtargetPredicate = isGFX90APlus
770
767
771
768
let SubtargetPredicate = isGFX940Plus, is_gfx940_xdl = 1 in {
772
769
defm V_MFMA_I32_32X32X16I8 : MAIInst<"v_mfma_i32_32x32x16i8", "I32_I64_X32", int_amdgcn_mfma_i32_32x32x16_i8>;
@@ -1632,14 +1629,17 @@ multiclass VOP3P_Real_MFMA_gfx940_aliases<string NameFrom, string NameTo, string
1632
1629
VOPProfile Pfl_ACD = PS_ACD.Pfl,
1633
1630
VOPProfile Pfl_VCD = PS_VCD.Pfl> {
1634
1631
if !ne(NameFrom, NameTo) then {
1635
- def : InstAlias <NameTo # " " # PS_ACD.AsmOperands,
1632
+ let SubtargetPredicate = PS_ACD.SubtargetPredicate,
1633
+ OtherPredicates = PS_ACD.OtherPredicates in {
1634
+ def : InstAlias <NameTo # " " # PS_ACD.AsmOperands,
1636
1635
(!cast<VOP3P_Real>(Op # "_gfx940_acd") Pfl_ACD.DstRC:$vdst,
1637
1636
Pfl_ACD.Src0RC64:$src0, Pfl_ACD.Src1RC64:$src1, Pfl_ACD.Src2RC64:$src2,
1638
1637
CBSZ:$cbsz, ABID:$abid, blgp:$blgp)>, PredicateControl;
1639
- def : InstAlias <NameTo # " " # PS_VCD.AsmOperands,
1638
+ def : InstAlias <NameTo # " " # PS_VCD.AsmOperands,
1640
1639
(!cast<VOP3P_Real>(Op # "_gfx940_vcd") Pfl_VCD.DstRC:$vdst,
1641
1640
Pfl_VCD.Src0RC64:$src0, Pfl_VCD.Src1RC64:$src1, Pfl_VCD.Src2RC64:$src2,
1642
1641
CBSZ:$cbsz, ABID:$abid, blgp:$blgp)>, PredicateControl;
1642
+ }
1643
1643
}
1644
1644
}
1645
1645
@@ -1656,7 +1656,10 @@ multiclass VOP3P_Real_MFMA_gfx940<bits<7> op, string Name = !cast<VOP3_Pseudo>(N
1656
1656
VOP3Pe_MAI <op, PS_VCD.Pfl, 0>;
1657
1657
} // End AssemblerPredicate = isGFX940Plus, DecoderNamespace = "GFX940"
1658
1658
1659
- let SubtargetPredicate = isGFX940Plus in {
1659
+ let SubtargetPredicate = PS_ACD.SubtargetPredicate,
1660
+ OtherPredicates = PS_ACD.OtherPredicates,
1661
+ AssemblerPredicate = isGFX940Plus
1662
+ in {
1660
1663
defm : VOP3P_Real_MFMA_gfx940_aliases<Name, PS_ACD.Mnemonic, NAME>;
1661
1664
1662
1665
if !ne(!subst("_1k", "", PS_ACD.Mnemonic), PS_ACD.Mnemonic) then
@@ -1703,7 +1706,6 @@ multiclass VOP3P_Real_SMFMAC<bits<7> op, string alias> {
1703
1706
}
1704
1707
}
1705
1708
1706
- let SubtargetPredicate = isGFX8GFX9 in {
1707
1709
defm V_PK_MAD_I16 : VOP3P_Real_vi <0x00>;
1708
1710
defm V_PK_MUL_LO_U16 : VOP3P_Real_vi <0x01>;
1709
1711
defm V_PK_ADD_I16 : VOP3P_Real_vi <0x02>;
@@ -1725,11 +1727,9 @@ defm V_PK_MUL_F16 : VOP3P_Real_vi <0x10>;
1725
1727
defm V_PK_MIN_F16 : VOP3P_Real_vi <0x11>;
1726
1728
defm V_PK_MAX_F16 : VOP3P_Real_vi <0x12>;
1727
1729
1728
- let OtherPredicates = [HasMadMixInsts] in {
1729
1730
defm V_MAD_MIX_F32 : VOP3P_Real_vi <0x20>;
1730
1731
defm V_MAD_MIXLO_F16 : VOP3P_Real_vi <0x21>;
1731
1732
defm V_MAD_MIXHI_F16 : VOP3P_Real_vi <0x22>;
1732
- }
1733
1733
1734
1734
let OtherPredicates = [HasFmaMixInsts],
1735
1735
DecoderNamespace = "GFX9_DL" in {
@@ -1750,9 +1750,6 @@ defm V_DOT8_U32_U4 : VOP3P_Real_vi <0x2b>;
1750
1750
1751
1751
defm V_DOT4_I32_I8 : VOP3P_Real_vi <0x28>;
1752
1752
defm V_DOT8_I32_I4 : VOP3P_Real_vi <0x2a>;
1753
- } // End SubtargetPredicate = isGFX8GFX9
1754
-
1755
- let OtherPredicates = [HasMAIInsts] in {
1756
1753
1757
1754
defm V_ACCVGPR_READ_B32 : VOP3P_Real_MAI <0x58>;
1758
1755
defm V_ACCVGPR_WRITE_B32 : VOP3P_Real_MAI <0x59>;
@@ -1778,8 +1775,6 @@ defm V_MFMA_F32_4X4X2BF16 : VOP3P_Real_MFMA_vi_gfx90a <0x6b>;
1778
1775
defm V_MFMA_F32_32X32X4BF16 : VOP3P_Real_MFMA_vi_gfx90a <0x6c>;
1779
1776
defm V_MFMA_F32_16X16X8BF16 : VOP3P_Real_MFMA_vi_gfx90a <0x6d>;
1780
1777
1781
- } // End OtherPredicates = [HasMAIInsts]
1782
-
1783
1778
defm V_MFMA_F32_32X32X4BF16_1K : VOP3P_Real_MFMA_gfx90a <0x63>;
1784
1779
defm V_MFMA_F32_16X16X4BF16_1K : VOP3P_Real_MFMA_gfx90a <0x64>;
1785
1780
defm V_MFMA_F32_4X4X4BF16_1K : VOP3P_Real_MFMA_gfx90a <0x65>;
@@ -1794,11 +1789,9 @@ defm V_MFMA_F32_32X32X16_BF16 : VOP3P_Real_MFMA_gfx950 <0x37, "v_mfma_f32_32x
1794
1789
1795
1790
defm V_MFMA_I32_32X32X16I8 : VOP3P_Real_MFMA_gfx940 <0x56, "v_mfma_i32_32x32x16_i8">;
1796
1791
defm V_MFMA_I32_16X16X32I8 : VOP3P_Real_MFMA_gfx940 <0x57, "v_mfma_i32_16x16x32_i8">;
1797
- let SubtargetPredicate = HasXF32Insts in {
1798
1792
defm V_MFMA_F32_16X16X8XF32 : VOP3P_Real_MFMA_gfx940 <0x3e, "v_mfma_f32_16x16x8_xf32">;
1799
1793
defm V_MFMA_F32_32X32X4XF32 : VOP3P_Real_MFMA_gfx940 <0x3f, "v_mfma_f32_32x32x4_xf32">;
1800
- } // End SubtargetPredicate = HasXF32Insts
1801
- let SubtargetPredicate = HasFP8Insts in {
1794
+
1802
1795
defm V_MFMA_F32_16X16X32_BF8_BF8 : VOP3P_Real_MFMA_gfx940 <0x70>;
1803
1796
defm V_MFMA_F32_16X16X32_BF8_FP8 : VOP3P_Real_MFMA_gfx940 <0x71>;
1804
1797
defm V_MFMA_F32_16X16X32_FP8_BF8 : VOP3P_Real_MFMA_gfx940 <0x72>;
@@ -1807,7 +1800,6 @@ defm V_MFMA_F32_32X32X16_BF8_BF8 : VOP3P_Real_MFMA_gfx940 <0x74>;
1807
1800
defm V_MFMA_F32_32X32X16_BF8_FP8 : VOP3P_Real_MFMA_gfx940 <0x75>;
1808
1801
defm V_MFMA_F32_32X32X16_FP8_BF8 : VOP3P_Real_MFMA_gfx940 <0x76>;
1809
1802
defm V_MFMA_F32_32X32X16_FP8_FP8 : VOP3P_Real_MFMA_gfx940 <0x77>;
1810
- } // End SubtargetPredicate = HasFP8Insts
1811
1803
1812
1804
defm V_MFMA_F32_32X32X4BF16_1K : VOP3P_Real_MFMA_gfx940 <0x5d, "v_mfma_f32_32x32x4_2b_bf16">;
1813
1805
defm V_MFMA_F32_16X16X4BF16_1K : VOP3P_Real_MFMA_gfx940 <0x5e, "v_mfma_f32_16x16x4_4b_bf16">;
@@ -1824,7 +1816,6 @@ defm V_SMFMAC_F32_16X16X32_BF16 : VOP3P_Real_SMFMAC <0x66, "v_smfmac_f32_16x1
1824
1816
defm V_SMFMAC_F32_32X32X16_BF16 : VOP3P_Real_SMFMAC <0x68, "v_smfmac_f32_32x32x16bf16">;
1825
1817
defm V_SMFMAC_I32_16X16X64_I8 : VOP3P_Real_SMFMAC <0x6a, "v_smfmac_i32_16x16x64i8">;
1826
1818
defm V_SMFMAC_I32_32X32X32_I8 : VOP3P_Real_SMFMAC <0x6c, "v_smfmac_i32_32x32x32i8">;
1827
- let SubtargetPredicate = HasFP8Insts in {
1828
1819
defm V_SMFMAC_F32_16X16X64_BF8_BF8 : VOP3P_Real_SMFMAC <0x78, "v_smfmac_f32_16x16x64bf8bf8">;
1829
1820
defm V_SMFMAC_F32_16X16X64_BF8_FP8 : VOP3P_Real_SMFMAC <0x79, "v_smfmac_f32_16x16x64bf8fp8">;
1830
1821
defm V_SMFMAC_F32_16X16X64_FP8_BF8 : VOP3P_Real_SMFMAC <0x7a, "v_smfmac_f32_16x16x64fp8bf8">;
@@ -1833,7 +1824,6 @@ defm V_SMFMAC_F32_32X32X32_BF8_BF8 : VOP3P_Real_SMFMAC <0x7c, "v_smfmac_f32_32x3
1833
1824
defm V_SMFMAC_F32_32X32X32_BF8_FP8 : VOP3P_Real_SMFMAC <0x7d, "v_smfmac_f32_32x32x32bf8fp8">;
1834
1825
defm V_SMFMAC_F32_32X32X32_FP8_BF8 : VOP3P_Real_SMFMAC <0x7e, "v_smfmac_f32_32x32x32fp8bf8">;
1835
1826
defm V_SMFMAC_F32_32X32X32_FP8_FP8 : VOP3P_Real_SMFMAC <0x7f, "v_smfmac_f32_32x32x32fp8fp8">;
1836
- } // End SubtargetPredicate = HasFP8Insts
1837
1827
1838
1828
defm V_PK_FMA_F32 : VOP3P_Real_vi <0x30>;
1839
1829
defm V_PK_MUL_F32 : VOP3P_Real_vi <0x31>;
0 commit comments