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[SelectionDAG] Add missing setValue calls in visitIntrinsicCall
Add missing setValue calls in SelectionDAGBuilder for mem-transfer intrinsic calls. These setValue calls are required in order to propagate pcsections metadata from IR to MIR. Reviewed By: melver Differential Revision: https://reviews.llvm.org/D141048
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‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5943,6 +5943,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
59435943
/* AlwaysInline */ false, isTC, MachinePointerInfo(I.getArgOperand(0)),
59445944
MachinePointerInfo(I.getArgOperand(1)), I.getAAMetadata(), AA);
59455945
updateDAGForMaybeTailCall(MC);
5946+
setValue(&I, MC);
59465947
return;
59475948
}
59485949
case Intrinsic::memcpy_inline: {
@@ -5964,6 +5965,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
59645965
/* AlwaysInline */ true, isTC, MachinePointerInfo(I.getArgOperand(0)),
59655966
MachinePointerInfo(I.getArgOperand(1)), I.getAAMetadata(), AA);
59665967
updateDAGForMaybeTailCall(MC);
5968+
setValue(&I, MC);
59675969
return;
59685970
}
59695971
case Intrinsic::memset: {
@@ -5980,6 +5982,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
59805982
Root, sdl, Op1, Op2, Op3, Alignment, isVol, /* AlwaysInline */ false,
59815983
isTC, MachinePointerInfo(I.getArgOperand(0)), I.getAAMetadata());
59825984
updateDAGForMaybeTailCall(MS);
5985+
setValue(&I, MS);
59835986
return;
59845987
}
59855988
case Intrinsic::memset_inline: {
@@ -5998,6 +6001,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
59986001
MachinePointerInfo(I.getArgOperand(0)),
59996002
I.getAAMetadata());
60006003
updateDAGForMaybeTailCall(MC);
6004+
setValue(&I, MC);
60016005
return;
60026006
}
60036007
case Intrinsic::memmove: {
@@ -6019,6 +6023,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
60196023
MachinePointerInfo(I.getArgOperand(1)),
60206024
I.getAAMetadata(), AA);
60216025
updateDAGForMaybeTailCall(MM);
6026+
setValue(&I, MM);
60226027
return;
60236028
}
60246029
case Intrinsic::memcpy_element_unordered_atomic: {
@@ -6035,6 +6040,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
60356040
isTC, MachinePointerInfo(MI.getRawDest()),
60366041
MachinePointerInfo(MI.getRawSource()));
60376042
updateDAGForMaybeTailCall(MC);
6043+
setValue(&I, MC);
60386044
return;
60396045
}
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case Intrinsic::memmove_element_unordered_atomic: {
@@ -6051,6 +6057,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
60516057
isTC, MachinePointerInfo(MI.getRawDest()),
60526058
MachinePointerInfo(MI.getRawSource()));
60536059
updateDAGForMaybeTailCall(MC);
6060+
setValue(&I, MC);
60546061
return;
60556062
}
60566063
case Intrinsic::memset_element_unordered_atomic: {
@@ -6066,6 +6073,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
60666073
DAG.getAtomicMemset(getRoot(), sdl, Dst, Val, Length, LengthTy, ElemSz,
60676074
isTC, MachinePointerInfo(MI.getRawDest()));
60686075
updateDAGForMaybeTailCall(MC);
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setValue(&I, MC);
60696077
return;
60706078
}
60716079
case Intrinsic::call_preallocated_setup: {

‎llvm/test/CodeGen/AArch64/pcsections-memtransfer.ll

Lines changed: 179 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,179 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2+
; RUN: llc < %s -global-isel=0 -mtriple=aarch64-unknown-linux-gnu -stop-after=aarch64-expand-pseudo -verify-machineinstrs | FileCheck %s
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define i64 @call_memcpy_intrinsic(ptr %src, ptr %dst, i64 %len) {
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; CHECK-LABEL: name: call_memcpy_intrinsic
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; CHECK: bb.0 (%ir-block.0):
7+
; CHECK-NEXT: liveins: $x0, $x1, $x2, $x19, $lr
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: early-clobber $sp = frame-setup STPXpre killed $lr, killed $x19, $sp, -2 :: (store (s64) into %stack.1), (store (s64) into %stack.0)
10+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w19, -8
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
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; CHECK-NEXT: $x19 = ORRXrs $xzr, $x1, 0
14+
; CHECK-NEXT: BL &memcpy, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit $x1, implicit $x2, implicit-def $sp, implicit-def dead $x0, pcsections !0
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; CHECK-NEXT: renamable $x0 = LDRXui killed renamable $x19, 0 :: (load (s64) from %ir.dst)
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; CHECK-NEXT: early-clobber $sp, $lr, $x19 = frame-destroy LDPXpost $sp, 2 :: (load (s64) from %stack.1), (load (s64) from %stack.0)
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; CHECK-NEXT: RET undef $lr, implicit $x0
18+
call void @llvm.memcpy.p0.p0.i64(ptr %src, ptr %dst, i64 %len, i1 1), !pcsections !0
19+
%val = load i64, ptr %dst
20+
ret i64 %val
21+
}
22+
23+
define i64 @call_memcpy_intrinsic_sm(ptr %src, ptr %dst) {
24+
; CHECK-LABEL: name: call_memcpy_intrinsic_sm
25+
; CHECK: bb.0 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0, $x1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $w8 = LDRBBui renamable $x1, 0, pcsections !0 :: (volatile load (s8) from %ir.dst)
29+
; CHECK-NEXT: STRBBui killed renamable $w8, killed renamable $x0, 0, pcsections !0 :: (volatile store (s8) into %ir.src)
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; CHECK-NEXT: renamable $x0 = LDRXui killed renamable $x1, 0 :: (load (s64) from %ir.dst)
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; CHECK-NEXT: RET undef $lr, implicit $x0
32+
call void @llvm.memcpy.p0.p0.i64(ptr %src, ptr %dst, i64 1, i1 1), !pcsections !0
33+
%val = load i64, ptr %dst
34+
ret i64 %val
35+
}
36+
37+
define i64 @call_memcpy_inline_intrinsic(ptr %src, ptr %dst) {
38+
; CHECK-LABEL: name: call_memcpy_inline_intrinsic
39+
; CHECK: bb.0 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0, $x1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $w8 = LDRBBui renamable $x1, 0, pcsections !0 :: (volatile load (s8) from %ir.dst)
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; CHECK-NEXT: STRBBui killed renamable $w8, killed renamable $x0, 0, pcsections !0 :: (volatile store (s8) into %ir.src)
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; CHECK-NEXT: renamable $x0 = LDRXui killed renamable $x1, 0 :: (load (s64) from %ir.dst)
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; CHECK-NEXT: RET undef $lr, implicit $x0
46+
call void @llvm.memcpy.inline.p0.p0.i64(ptr %src, ptr %dst, i64 1, i1 1), !pcsections !0
47+
%val = load i64, ptr %dst
48+
ret i64 %val
49+
}
50+
51+
define i64 @call_memmove_intrinsic(ptr %src, ptr %dst, i64 %len) {
52+
; CHECK-LABEL: name: call_memmove_intrinsic
53+
; CHECK: bb.0 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0, $x1, $x2, $x19, $lr
55+
; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: early-clobber $sp = frame-setup STPXpre killed $lr, killed $x19, $sp, -2 :: (store (s64) into %stack.1), (store (s64) into %stack.0)
57+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
58+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w19, -8
59+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
60+
; CHECK-NEXT: $x19 = ORRXrs $xzr, $x1, 0
61+
; CHECK-NEXT: BL &memmove, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit $x1, implicit $x2, implicit-def $sp, implicit-def dead $x0, pcsections !0
62+
; CHECK-NEXT: renamable $x0 = LDRXui killed renamable $x19, 0 :: (load (s64) from %ir.dst)
63+
; CHECK-NEXT: early-clobber $sp, $lr, $x19 = frame-destroy LDPXpost $sp, 2 :: (load (s64) from %stack.1), (load (s64) from %stack.0)
64+
; CHECK-NEXT: RET undef $lr, implicit $x0
65+
call void @llvm.memmove.p0.p0.i64(ptr %src, ptr %dst, i64 %len, i1 1), !pcsections !0
66+
%val = load i64, ptr %dst
67+
ret i64 %val
68+
}
69+
70+
define i64 @call_memset_intrinsic(ptr %dst, i64 %len) {
71+
; CHECK-LABEL: name: call_memset_intrinsic
72+
; CHECK: bb.0 (%ir-block.0):
73+
; CHECK-NEXT: liveins: $x0, $x1, $x19, $lr
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; CHECK-NEXT: {{ $}}
75+
; CHECK-NEXT: early-clobber $sp = frame-setup STPXpre killed $lr, killed $x19, $sp, -2 :: (store (s64) into %stack.1), (store (s64) into %stack.0)
76+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
77+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w19, -8
78+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
79+
; CHECK-NEXT: $x2 = ORRXrs $xzr, $x1, 0
80+
; CHECK-NEXT: $x19 = ORRXrs $xzr, $x0, 0
81+
; CHECK-NEXT: $w1 = ORRWrs $wzr, $wzr, 0
82+
; CHECK-NEXT: BL &memset, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit $w1, implicit $x2, implicit-def $sp, implicit-def dead $x0, pcsections !0
83+
; CHECK-NEXT: renamable $x0 = LDRXui killed renamable $x19, 0 :: (load (s64) from %ir.dst)
84+
; CHECK-NEXT: early-clobber $sp, $lr, $x19 = frame-destroy LDPXpost $sp, 2 :: (load (s64) from %stack.1), (load (s64) from %stack.0)
85+
; CHECK-NEXT: RET undef $lr, implicit $x0
86+
call void @llvm.memset.p0.p0.i64(ptr %dst, i8 0, i64 %len, i1 1), !pcsections !0
87+
%val = load i64, ptr %dst
88+
ret i64 %val
89+
}
90+
91+
define i64 @call_memset_inline_intrinsic(ptr %dst) {
92+
; CHECK-LABEL: name: call_memset_inline_intrinsic
93+
; CHECK: bb.0 (%ir-block.0):
94+
; CHECK-NEXT: liveins: $x0
95+
; CHECK-NEXT: {{ $}}
96+
; CHECK-NEXT: STRBBui $wzr, renamable $x0, 0, pcsections !0 :: (volatile store (s8) into %ir.dst)
97+
; CHECK-NEXT: renamable $x0 = LDRXui killed renamable $x0, 0 :: (load (s64) from %ir.dst)
98+
; CHECK-NEXT: RET undef $lr, implicit $x0
99+
call void @llvm.memset.inline.p0.p0.i64(ptr %dst, i8 0, i64 1, i1 1), !pcsections !0
100+
%val = load i64, ptr %dst
101+
ret i64 %val
102+
}
103+
104+
define i64 @call_memcpy_element_unordered_atomic_intrinsic() {
105+
; CHECK-LABEL: name: call_memcpy_element_unordered_atomic_intrinsic
106+
; CHECK: bb.0 (%ir-block.0):
107+
; CHECK-NEXT: liveins: $lr
108+
; CHECK-NEXT: {{ $}}
109+
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.2)
110+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
111+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
112+
; CHECK-NEXT: $x0 = ADDXri $sp, 12, 0
113+
; CHECK-NEXT: $x1 = ADDXri $sp, 8, 0
114+
; CHECK-NEXT: dead $w2 = MOVZWi 1, 0, implicit-def $x2
115+
; CHECK-NEXT: BL &__llvm_memcpy_element_unordered_atomic_1, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit killed $x1, implicit killed $x2, implicit-def $sp, pcsections !0
116+
; CHECK-NEXT: renamable $x0 = LDRXui $sp, 1 :: (load (s64) from %ir.dst)
117+
; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.2)
118+
; CHECK-NEXT: RET undef $lr, implicit $x0
119+
%src = alloca i32, align 1
120+
%dst = alloca i32, align 1
121+
call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %src, ptr align 1 %dst, i64 1, i32 1), !pcsections !0
122+
%val = load i64, ptr %dst
123+
ret i64 %val
124+
}
125+
126+
define i64 @call_memmove_element_unordered_atomic_intrinsic() {
127+
; CHECK-LABEL: name: call_memmove_element_unordered_atomic_intrinsic
128+
; CHECK: bb.0 (%ir-block.0):
129+
; CHECK-NEXT: liveins: $lr
130+
; CHECK-NEXT: {{ $}}
131+
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.2)
132+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
133+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
134+
; CHECK-NEXT: $x0 = ADDXri $sp, 12, 0
135+
; CHECK-NEXT: $x1 = ADDXri $sp, 8, 0
136+
; CHECK-NEXT: dead $w2 = MOVZWi 1, 0, implicit-def $x2
137+
; CHECK-NEXT: BL &__llvm_memmove_element_unordered_atomic_1, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit killed $x1, implicit killed $x2, implicit-def $sp, pcsections !0
138+
; CHECK-NEXT: renamable $x0 = LDRXui $sp, 1 :: (load (s64) from %ir.dst)
139+
; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.2)
140+
; CHECK-NEXT: RET undef $lr, implicit $x0
141+
%src = alloca i32, align 1
142+
%dst = alloca i32, align 1
143+
call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 %src, ptr align 1 %dst, i64 1, i32 1), !pcsections !0
144+
%val = load i64, ptr %dst
145+
ret i64 %val
146+
}
147+
148+
define i64 @call_memset_element_unordered_atomic_intrinsic() {
149+
; CHECK-LABEL: name: call_memset_element_unordered_atomic_intrinsic
150+
; CHECK: bb.0 (%ir-block.0):
151+
; CHECK-NEXT: liveins: $lr
152+
; CHECK-NEXT: {{ $}}
153+
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.1)
154+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
155+
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
156+
; CHECK-NEXT: $x0 = ADDXri $sp, 12, 0
157+
; CHECK-NEXT: $w1 = ORRWrs $wzr, $wzr, 0
158+
; CHECK-NEXT: dead $w2 = MOVZWi 1, 0, implicit-def $x2
159+
; CHECK-NEXT: BL &__llvm_memset_element_unordered_atomic_1, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit killed $w1, implicit killed $x2, implicit-def $sp, pcsections !0
160+
; CHECK-NEXT: renamable $x0 = LDURXi $sp, 12 :: (load (s64) from %ir.dst)
161+
; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.1)
162+
; CHECK-NEXT: RET undef $lr, implicit $x0
163+
%dst = alloca i32, align 1
164+
call void @llvm.memset.element.unordered.atomic.p0.p0.i64(ptr align 1 %dst, i8 0, i64 1, i32 1), !pcsections !0
165+
%val = load i64, ptr %dst
166+
ret i64 %val
167+
}
168+
169+
170+
!0 = !{!"foo"}
171+
172+
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1)
173+
declare void @llvm.memcpy.inline.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1)
174+
declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1)
175+
declare void @llvm.memset.p0.p0.i64(ptr nocapture, i8, i64, i1)
176+
declare void @llvm.memset.inline.p0.p0.i64(ptr nocapture, i8, i64, i1)
177+
declare void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i32)
178+
declare void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i32)
179+
declare void @llvm.memset.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, i8, i64, i32)

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