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[GlobalISel] Call setInstrAndDebugLoc before tryCombineAll
This can remove all unnecessary redundant calls in each combiner.
1 parent 3f69d90 commit 115a2f0

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2 files changed

+6
-50
lines changed

2 files changed

+6
-50
lines changed

‎llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 5 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -872,7 +872,6 @@ bool CombinerHelper::matchSextTruncSextLoad(MachineInstr &MI) {
872872

873873
void CombinerHelper::applySextTruncSextLoad(MachineInstr &MI) {
874874
assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG);
875-
Builder.setInstrAndDebugLoc(MI);
876875
Builder.buildCopy(MI.getOperand(0).getReg(), MI.getOperand(1).getReg());
877876
MI.eraseFromParent();
878877
}
@@ -1299,7 +1298,6 @@ bool CombinerHelper::matchCombineIndexedLoadStore(
12991298
void CombinerHelper::applyCombineIndexedLoadStore(
13001299
MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo) {
13011300
MachineInstr &AddrDef = *MRI.getUniqueVRegDef(MatchInfo.Addr);
1302-
Builder.setInstrAndDebugLoc(MI);
13031301
unsigned Opcode = MI.getOpcode();
13041302
bool IsStore = Opcode == TargetOpcode::G_STORE;
13051303
unsigned NewOpcode = getIndexedOpc(Opcode);
@@ -1416,14 +1414,8 @@ void CombinerHelper::applyCombineDivRem(MachineInstr &MI,
14161414
// deps by "moving" the instruction incorrectly. Also keep track of which
14171415
// instruction is first so we pick it's operands, avoiding use-before-def
14181416
// bugs.
1419-
MachineInstr *FirstInst;
1420-
if (dominates(MI, *OtherMI)) {
1421-
Builder.setInstrAndDebugLoc(MI);
1422-
FirstInst = &MI;
1423-
} else {
1424-
Builder.setInstrAndDebugLoc(*OtherMI);
1425-
FirstInst = OtherMI;
1426-
}
1417+
MachineInstr *FirstInst = dominates(MI, *OtherMI) ? &MI : OtherMI;
1418+
Builder.setInstrAndDebugLoc(*FirstInst);
14271419

14281420
Builder.buildInstr(IsSigned ? TargetOpcode::G_SDIVREM
14291421
: TargetOpcode::G_UDIVREM,
@@ -1556,7 +1548,6 @@ static APFloat constantFoldFpUnary(const MachineInstr &MI,
15561548

15571549
void CombinerHelper::applyCombineConstantFoldFpUnary(MachineInstr &MI,
15581550
const ConstantFP *Cst) {
1559-
Builder.setInstrAndDebugLoc(MI);
15601551
APFloat Folded = constantFoldFpUnary(MI, MRI, Cst->getValue());
15611552
const ConstantFP *NewCst = ConstantFP::get(Builder.getContext(), Folded);
15621553
Builder.buildFConstant(MI.getOperand(0), *NewCst);
@@ -1691,7 +1682,6 @@ void CombinerHelper::applyShiftImmedChain(MachineInstr &MI,
16911682
Opcode == TargetOpcode::G_USHLSAT) &&
16921683
"Expected G_SHL, G_ASHR, G_LSHR, G_SSHLSAT or G_USHLSAT");
16931684

1694-
Builder.setInstrAndDebugLoc(MI);
16951685
LLT Ty = MRI.getType(MI.getOperand(1).getReg());
16961686
unsigned const ScalarSizeInBits = Ty.getScalarSizeInBits();
16971687
auto Imm = MatchInfo.Imm;
@@ -1807,7 +1797,6 @@ void CombinerHelper::applyShiftOfShiftedLogic(MachineInstr &MI,
18071797

18081798
LLT ShlType = MRI.getType(MI.getOperand(2).getReg());
18091799
LLT DestType = MRI.getType(MI.getOperand(0).getReg());
1810-
Builder.setInstrAndDebugLoc(MI);
18111800

18121801
Register Const = Builder.buildConstant(ShlType, MatchInfo.ValSum).getReg(0);
18131802

@@ -1943,7 +1932,6 @@ void CombinerHelper::applyCombineShlOfExtend(MachineInstr &MI,
19431932
int64_t ShiftAmtVal = MatchData.Imm;
19441933

19451934
LLT ExtSrcTy = MRI.getType(ExtSrcReg);
1946-
Builder.setInstrAndDebugLoc(MI);
19471935
auto ShiftAmt = Builder.buildConstant(ExtSrcTy, ShiftAmtVal);
19481936
auto NarrowShift =
19491937
Builder.buildShl(ExtSrcTy, ExtSrcReg, ShiftAmt, MI.getFlags());
@@ -2013,7 +2001,6 @@ void CombinerHelper::applyCombineUnmergeMergeToPlainValues(
20132001
LLT SrcTy = MRI.getType(Operands[0]);
20142002
LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
20152003
bool CanReuseInputDirectly = DstTy == SrcTy;
2016-
Builder.setInstrAndDebugLoc(MI);
20172004
for (unsigned Idx = 0; Idx < NumElems; ++Idx) {
20182005
Register DstReg = MI.getOperand(Idx).getReg();
20192006
Register SrcReg = Operands[Idx];
@@ -2066,7 +2053,6 @@ void CombinerHelper::applyCombineUnmergeConstant(MachineInstr &MI,
20662053
assert((MI.getNumOperands() - 1 == Csts.size()) &&
20672054
"Not enough operands to replace all defs");
20682055
unsigned NumElems = MI.getNumOperands() - 1;
2069-
Builder.setInstrAndDebugLoc(MI);
20702056
for (unsigned Idx = 0; Idx < NumElems; ++Idx) {
20712057
Register DstReg = MI.getOperand(Idx).getReg();
20722058
Builder.buildConstant(DstReg, Csts[Idx]);
@@ -2104,7 +2090,6 @@ bool CombinerHelper::matchCombineUnmergeWithDeadLanesToTrunc(MachineInstr &MI) {
21042090
}
21052091

21062092
void CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(MachineInstr &MI) {
2107-
Builder.setInstrAndDebugLoc(MI);
21082093
Register SrcReg = MI.getOperand(MI.getNumDefs()).getReg();
21092094
Register Dst0Reg = MI.getOperand(0).getReg();
21102095
Builder.buildTrunc(Dst0Reg, SrcReg);
@@ -2152,8 +2137,6 @@ void CombinerHelper::applyCombineUnmergeZExtToZExt(MachineInstr &MI) {
21522137
LLT Dst0Ty = MRI.getType(Dst0Reg);
21532138
LLT ZExtSrcTy = MRI.getType(ZExtSrcReg);
21542139

2155-
Builder.setInstrAndDebugLoc(MI);
2156-
21572140
if (Dst0Ty.getSizeInBits() > ZExtSrcTy.getSizeInBits()) {
21582141
Builder.buildZExt(Dst0Reg, ZExtSrcReg);
21592142
} else {
@@ -2207,7 +2190,6 @@ void CombinerHelper::applyCombineShiftToUnmerge(MachineInstr &MI,
22072190

22082191
LLT HalfTy = LLT::scalar(HalfSize);
22092192

2210-
Builder.setInstr(MI);
22112193
auto Unmerge = Builder.buildUnmerge(HalfTy, SrcReg);
22122194
unsigned NarrowShiftAmt = ShiftVal - HalfSize;
22132195

@@ -2292,15 +2274,13 @@ bool CombinerHelper::matchCombineI2PToP2I(MachineInstr &MI, Register &Reg) {
22922274
void CombinerHelper::applyCombineI2PToP2I(MachineInstr &MI, Register &Reg) {
22932275
assert(MI.getOpcode() == TargetOpcode::G_INTTOPTR && "Expected a G_INTTOPTR");
22942276
Register DstReg = MI.getOperand(0).getReg();
2295-
Builder.setInstr(MI);
22962277
Builder.buildCopy(DstReg, Reg);
22972278
MI.eraseFromParent();
22982279
}
22992280

23002281
void CombinerHelper::applyCombineP2IToI2P(MachineInstr &MI, Register &Reg) {
23012282
assert(MI.getOpcode() == TargetOpcode::G_PTRTOINT && "Expected a G_PTRTOINT");
23022283
Register DstReg = MI.getOperand(0).getReg();
2303-
Builder.setInstr(MI);
23042284
Builder.buildZExtOrTrunc(DstReg, Reg);
23052285
MI.eraseFromParent();
23062286
}
@@ -2343,7 +2323,6 @@ void CombinerHelper::applyCombineAddP2IToPtrAdd(
23432323

23442324
LLT PtrTy = MRI.getType(LHS);
23452325

2346-
Builder.setInstrAndDebugLoc(MI);
23472326
auto PtrAdd = Builder.buildPtrAdd(PtrTy, LHS, RHS);
23482327
Builder.buildPtrToInt(Dst, PtrAdd);
23492328
MI.eraseFromParent();
@@ -2375,7 +2354,6 @@ void CombinerHelper::applyCombineConstPtrAddToI2P(MachineInstr &MI,
23752354
auto &PtrAdd = cast<GPtrAdd>(MI);
23762355
Register Dst = PtrAdd.getReg(0);
23772356

2378-
Builder.setInstrAndDebugLoc(MI);
23792357
Builder.buildConstant(Dst, NewCst);
23802358
PtrAdd.eraseFromParent();
23812359
}
@@ -2455,7 +2433,6 @@ void CombinerHelper::applyCombineExtOfExt(
24552433
(MI.getOpcode() == TargetOpcode::G_SEXT &&
24562434
SrcExtOp == TargetOpcode::G_ZEXT)) {
24572435
Register DstReg = MI.getOperand(0).getReg();
2458-
Builder.setInstrAndDebugLoc(MI);
24592436
Builder.buildInstr(SrcExtOp, {DstReg}, {Reg});
24602437
MI.eraseFromParent();
24612438
}
@@ -2488,7 +2465,6 @@ void CombinerHelper::applyCombineTruncOfExt(
24882465
replaceRegWith(MRI, DstReg, SrcReg);
24892466
return;
24902467
}
2491-
Builder.setInstrAndDebugLoc(MI);
24922468
if (SrcTy.getSizeInBits() < DstTy.getSizeInBits())
24932469
Builder.buildInstr(SrcExtOp, {DstReg}, {SrcReg});
24942470
else
@@ -2576,8 +2552,6 @@ bool CombinerHelper::matchCombineTruncOfShift(
25762552

25772553
void CombinerHelper::applyCombineTruncOfShift(
25782554
MachineInstr &MI, std::pair<MachineInstr *, LLT> &MatchInfo) {
2579-
Builder.setInstrAndDebugLoc(MI);
2580-
25812555
MachineInstr *ShiftMI = MatchInfo.first;
25822556
LLT NewShiftTy = MatchInfo.second;
25832557

@@ -2823,7 +2797,6 @@ void CombinerHelper::applyFunnelShiftConstantModulo(MachineInstr &MI) {
28232797
APInt NewConst = VRegAndVal->Value.urem(
28242798
APInt(ConstTy.getSizeInBits(), DstTy.getScalarSizeInBits()));
28252799

2826-
Builder.setInstrAndDebugLoc(MI);
28272800
auto NewConstInstr = Builder.buildConstant(ConstTy, NewConst.getZExtValue());
28282801
Builder.buildInstr(
28292802
MI.getOpcode(), {MI.getOperand(0)},
@@ -2866,35 +2839,31 @@ bool CombinerHelper::matchOperandIsKnownToBeAPowerOfTwo(MachineInstr &MI,
28662839

28672840
void CombinerHelper::replaceInstWithFConstant(MachineInstr &MI, double C) {
28682841
assert(MI.getNumDefs() == 1 && "Expected only one def?");
2869-
Builder.setInstr(MI);
28702842
Builder.buildFConstant(MI.getOperand(0), C);
28712843
MI.eraseFromParent();
28722844
}
28732845

28742846
void CombinerHelper::replaceInstWithConstant(MachineInstr &MI, int64_t C) {
28752847
assert(MI.getNumDefs() == 1 && "Expected only one def?");
2876-
Builder.setInstr(MI);
28772848
Builder.buildConstant(MI.getOperand(0), C);
28782849
MI.eraseFromParent();
28792850
}
28802851

28812852
void CombinerHelper::replaceInstWithConstant(MachineInstr &MI, APInt C) {
28822853
assert(MI.getNumDefs() == 1 && "Expected only one def?");
2883-
Builder.setInstr(MI);
28842854
Builder.buildConstant(MI.getOperand(0), C);
28852855
MI.eraseFromParent();
28862856
}
28872857

2888-
void CombinerHelper::replaceInstWithFConstant(MachineInstr &MI, ConstantFP *CFP) {
2858+
void CombinerHelper::replaceInstWithFConstant(MachineInstr &MI,
2859+
ConstantFP *CFP) {
28892860
assert(MI.getNumDefs() == 1 && "Expected only one def?");
2890-
Builder.setInstr(MI);
28912861
Builder.buildFConstant(MI.getOperand(0), CFP->getValueAPF());
28922862
MI.eraseFromParent();
28932863
}
28942864

28952865
void CombinerHelper::replaceInstWithUndef(MachineInstr &MI) {
28962866
assert(MI.getNumDefs() == 1 && "Expected only one def?");
2897-
Builder.setInstr(MI);
28982867
Builder.buildUndef(MI.getOperand(0));
28992868
MI.eraseFromParent();
29002869
}
@@ -2962,7 +2931,6 @@ bool CombinerHelper::matchCombineInsertVecElts(
29622931

29632932
void CombinerHelper::applyCombineInsertVecElts(
29642933
MachineInstr &MI, SmallVectorImpl<Register> &MatchInfo) {
2965-
Builder.setInstr(MI);
29662934
Register UndefReg;
29672935
auto GetUndef = [&]() {
29682936
if (UndefReg)
@@ -2981,7 +2949,6 @@ void CombinerHelper::applyCombineInsertVecElts(
29812949

29822950
void CombinerHelper::applySimplifyAddToSub(
29832951
MachineInstr &MI, std::tuple<Register, Register> &MatchInfo) {
2984-
Builder.setInstr(MI);
29852952
Register SubLHS, SubRHS;
29862953
std::tie(SubLHS, SubRHS) = MatchInfo;
29872954
Builder.buildSub(MI.getOperand(0).getReg(), SubLHS, SubRHS);
@@ -3084,7 +3051,6 @@ void CombinerHelper::applyBuildInstructionSteps(
30843051
MachineInstr &MI, InstructionStepsMatchInfo &MatchInfo) {
30853052
assert(MatchInfo.InstrsToBuild.size() &&
30863053
"Expected at least one instr to build?");
3087-
Builder.setInstr(MI);
30883054
for (auto &InstrToBuild : MatchInfo.InstrsToBuild) {
30893055
assert(InstrToBuild.Opcode && "Expected a valid opcode?");
30903056
assert(InstrToBuild.OperandFns.size() && "Expected at least one operand?");
@@ -3120,7 +3086,6 @@ void CombinerHelper::applyAshShlToSextInreg(
31203086
int64_t ShiftAmt;
31213087
std::tie(Src, ShiftAmt) = MatchInfo;
31223088
unsigned Size = MRI.getType(Src).getScalarSizeInBits();
3123-
Builder.setInstrAndDebugLoc(MI);
31243089
Builder.buildSExtInReg(MI.getOperand(0).getReg(), Src, Size - ShiftAmt);
31253090
MI.eraseFromParent();
31263091
}
@@ -3399,7 +3364,6 @@ bool CombinerHelper::matchXorOfAndWithSameReg(
33993364
void CombinerHelper::applyXorOfAndWithSameReg(
34003365
MachineInstr &MI, std::pair<Register, Register> &MatchInfo) {
34013366
// Fold (xor (and x, y), y) -> (and (not x), y)
3402-
Builder.setInstrAndDebugLoc(MI);
34033367
Register X, Y;
34043368
std::tie(X, Y) = MatchInfo;
34053369
auto Not = Builder.buildNot(MRI.getType(X), X);
@@ -3442,7 +3406,6 @@ void CombinerHelper::applySimplifyURemByPow2(MachineInstr &MI) {
34423406
Register Src0 = MI.getOperand(1).getReg();
34433407
Register Pow2Src1 = MI.getOperand(2).getReg();
34443408
LLT Ty = MRI.getType(DstReg);
3445-
Builder.setInstrAndDebugLoc(MI);
34463409

34473410
// Fold (urem x, pow2) -> (and x, pow2-1)
34483411
auto NegOne = Builder.buildConstant(Ty, -1);
@@ -3507,8 +3470,6 @@ bool CombinerHelper::matchFoldBinOpIntoSelect(MachineInstr &MI,
35073470
/// to fold.
35083471
void CombinerHelper::applyFoldBinOpIntoSelect(MachineInstr &MI,
35093472
const unsigned &SelectOperand) {
3510-
Builder.setInstrAndDebugLoc(MI);
3511-
35123473
Register Dst = MI.getOperand(0).getReg();
35133474
Register LHS = MI.getOperand(1).getReg();
35143475
Register RHS = MI.getOperand(2).getReg();
@@ -4029,7 +3990,6 @@ void CombinerHelper::applyExtractVecEltBuildVec(MachineInstr &MI,
40293990
Register DstReg = MI.getOperand(0).getReg();
40303991
LLT DstTy = MRI.getType(DstReg);
40313992

4032-
Builder.setInstrAndDebugLoc(MI);
40333993
if (ScalarTy != DstTy) {
40343994
assert(ScalarTy.getSizeInBits() > DstTy.getSizeInBits());
40353995
Builder.buildTrunc(DstReg, Reg);
@@ -4095,14 +4055,12 @@ void CombinerHelper::applyExtractAllEltsFromBuildVector(
40954055

40964056
void CombinerHelper::applyBuildFn(
40974057
MachineInstr &MI, std::function<void(MachineIRBuilder &)> &MatchInfo) {
4098-
Builder.setInstrAndDebugLoc(MI);
4099-
MatchInfo(Builder);
4058+
applyBuildFnNoErase(MI, MatchInfo);
41004059
MI.eraseFromParent();
41014060
}
41024061

41034062
void CombinerHelper::applyBuildFnNoErase(
41044063
MachineInstr &MI, std::function<void(MachineIRBuilder &)> &MatchInfo) {
4105-
Builder.setInstrAndDebugLoc(MI);
41064064
MatchInfo(Builder);
41074065
}
41084066

@@ -4204,7 +4162,6 @@ void CombinerHelper::applyRotateOutOfRange(MachineInstr &MI) {
42044162
MI.getOpcode() == TargetOpcode::G_ROTR);
42054163
unsigned Bitsize =
42064164
MRI.getType(MI.getOperand(0).getReg()).getScalarSizeInBits();
4207-
Builder.setInstrAndDebugLoc(MI);
42084165
Register Amt = MI.getOperand(2).getReg();
42094166
LLT AmtTy = MRI.getType(Amt);
42104167
auto Bits = Builder.buildConstant(AmtTy, Bitsize);
@@ -5294,7 +5251,6 @@ void CombinerHelper::applyUMulHToLShr(MachineInstr &MI) {
52945251
LLT ShiftAmtTy = getTargetLowering().getPreferredShiftAmountTy(Ty);
52955252
unsigned NumEltBits = Ty.getScalarSizeInBits();
52965253

5297-
Builder.setInstrAndDebugLoc(MI);
52985254
auto LogBase2 = buildLogBase2(RHS, Builder);
52995255
auto ShiftAmt =
53005256
Builder.buildSub(Ty, Builder.buildConstant(Ty, NumEltBits), LogBase2);
@@ -5374,7 +5330,6 @@ bool CombinerHelper::matchFsubToFneg(MachineInstr &MI, Register &MatchInfo) {
53745330
}
53755331

53765332
void CombinerHelper::applyFsubToFneg(MachineInstr &MI, Register &MatchInfo) {
5377-
Builder.setInstrAndDebugLoc(MI);
53785333
Register Dst = MI.getOperand(0).getReg();
53795334
Builder.buildFNeg(
53805335
Dst, Builder.buildFCanonicalize(MRI.getType(Dst), MatchInfo).getReg(0));

‎llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2459,6 +2459,7 @@ void GICombinerEmitter::emitRunCustomAction(raw_ostream &OS) {
24592459
OS << " switch(ApplyID) {\n";
24602460
for (const auto &Apply : ApplyCode) {
24612461
OS << " case " << Apply->getEnumNameWithPrefix(CXXApplyPrefix) << ":{\n"
2462+
<< " Helper.getBuilder().setInstrAndDebugLoc(*State.MIs[0]);\n"
24622463
<< " " << join(split(Apply->Code, '\n'), "\n ") << '\n'
24632464
<< " return;\n";
24642465
OS << " }\n";

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