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parsifal-47arsenm
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[GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (#121247)
This is a fix for: #97290 Please let me know if that is the right way to address the issue. Thank you! --------- Co-authored-by: Renat Idrisov <[email protected]> Co-authored-by: Matt Arsenault <[email protected]>
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+45
-3
lines changed

4 files changed

+45
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llvm/lib/CodeGen/MachineVerifier.cpp

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@@ -1281,6 +1281,15 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
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if (TypeSize::isKnownGT(MMO.getSize().getValue(),
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ValTy.getSizeInBytes()))
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report("load memory size cannot exceed result size", MI);
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if (MMO.getRanges()) {
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ConstantInt *i =
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mdconst::extract<ConstantInt>(MMO.getRanges()->getOperand(0));
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if (i->getIntegerType()->getBitWidth() !=
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ValTy.getScalarType().getSizeInBits()) {
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report("range is incompatible with the result type", MI);
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}
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}
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} else if (MI->getOpcode() == TargetOpcode::G_STORE) {
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if (TypeSize::isKnownLT(ValTy.getSizeInBytes(),
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MMO.getSize().getValue()))

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir

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@@ -30,6 +30,7 @@
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!0 = !{i24 0, i24 1048575}
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!1 = !{!"omnipotent char", !2}
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!2 = !{!"Simple C/C++ TBAA"}
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!3 = !{i32 0, i32 1048575}
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...
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# Make sure range metadata is not preserved when widening loads, but
@@ -67,7 +68,7 @@ body: |
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; SI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load (s32), !tbaa !1, addrspace 1)
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; SI-NEXT: $vgpr0 = COPY [[LOAD]](s32)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(s32) = G_LOAD %0 :: (load (s24), align 4, addrspace 1, !range !0, !tbaa !1)
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%1:_(s32) = G_LOAD %0 :: (load (s24), align 4, addrspace 1, !range !3, !tbaa !1)
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$vgpr0 = COPY %1
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...

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir

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Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
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!0 = !{i96 0, i96 9223372036854775808}
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!1 = !{!"omnipotent char", !2}
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!2 = !{!"Simple C/C++ TBAA"}
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!3 = !{i32 0, i32 2147483646}
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...
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# Make sure range metadata is not preserved when widening loads, but
@@ -44,10 +45,10 @@ body: |
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; GFX12: liveins: $sgpr0_sgpr1
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; GFX12-NEXT: {{ $}}
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; GFX12-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
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; GFX12-NEXT: [[LOAD:%[0-9]+]]:sgpr(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load (<3 x s32>), align 8, !range !0, addrspace 4)
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; GFX12-NEXT: [[LOAD:%[0-9]+]]:sgpr(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load (<3 x s32>), align 8
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; GFX12-NEXT: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
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%0:_(p4) = COPY $sgpr0_sgpr1
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%1:_(<3 x s32>) = G_LOAD %0 :: (load (<3 x s32>), align 8, addrspace 4, !range !0)
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%1:_(<3 x s32>) = G_LOAD %0 :: (load (<3 x s32>), align 8, addrspace 4, !range !3)
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$sgpr0_sgpr1_sgpr2 = COPY %1
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...
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
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# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
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--- |
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define void @mismatched_range_type() {
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ret void
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}
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!0 = !{i64 -4294967295, i64 4294967296}
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...
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---
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name: mismatched_range_type
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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%1:_(s32) = COPY $vgpr0
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%2:_(s32) = COPY $vgpr1
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%0:_(p1) = G_MERGE_VALUES %1(s32), %2(s32)
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; CHECK: Bad machine code: range is incompatible with the result type
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%3:_(<2 x s32>) = G_LOAD %0(p1) :: (volatile load (s64), align 4, !range !0, addrspace 1)
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%4:_(p0) = G_LOAD %0(p1) :: (volatile load (s64), align 4, !range !0, addrspace 1)
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%5:_(<2 x p0>) = G_LOAD %0(p1) :: (volatile load (s64), align 4, !range !0, addrspace 1)
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$vgpr0_vgpr1 = COPY %3
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SI_RETURN implicit $vgpr0_vgpr1
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...

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