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[GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication
SelectionDAG already converts FPOWI into multiplications, this patch introduces the same optimization into GlobalISel.
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6 files changed

+1128
-299
lines changed

6 files changed

+1128
-299
lines changed

‎llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h

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@@ -865,6 +865,10 @@ class CombinerHelper {
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/// By default, it erases the instruction def'd on \p MO from the function.
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void applyBuildFnMO(const MachineOperand &MO, BuildFnTy &MatchInfo);
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/// Expands FPOWI into a series of multiplications and a division if the
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/// exponent is negative.
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void applyExpandFPowI(MachineInstr &MI, BuildFnTy &MatchInfo);
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/// Combine insert vector element OOB.
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bool matchInsertVectorElementOOB(MachineInstr &MI, BuildFnTy &MatchInfo);
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‎llvm/include/llvm/Target/GlobalISel/Combine.td

Lines changed: 7 additions & 1 deletion
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@@ -1636,6 +1636,12 @@ def sub_of_vscale : GICombineRule<
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[{ return Helper.matchSubOfVScale(${root}, ${matchinfo}); }]),
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(apply [{ Helper.applyBuildFnMO(${root}, ${matchinfo}); }])>;
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def expand_const_fpowi : GICombineRule<
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(defs root:$root, build_fn_matchinfo:$matchinfo),
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(match (G_CONSTANT $int, $imm),
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(G_FPOWI $dst, $float, $int):$root),
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(apply [{ Helper.applyExpandFPowI(*${root}, ${matchinfo}); }])>;
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// match_extract_of_element and insert_vector_elt_oob must be the first!
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def vector_ops_combines: GICombineGroup<[
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match_extract_of_element_undef_vector,
@@ -1786,7 +1792,7 @@ def identity_combines : GICombineGroup<[select_same_val, right_identity_zero,
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def const_combines : GICombineGroup<[constant_fold_fp_ops, const_ptradd_to_i2p,
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overlapping_and, mulo_by_2, mulo_by_0,
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adde_to_addo,
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combine_minmax_nan]>;
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combine_minmax_nan, expand_const_fpowi]>;
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def known_bits_simplifications : GICombineGroup<[
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redundant_and, redundant_sext_inreg, redundant_or, urem_pow2_to_mask,

‎llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7356,6 +7356,38 @@ void CombinerHelper::applyBuildFnMO(const MachineOperand &MO,
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Root->eraseFromParent();
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}
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void CombinerHelper::applyExpandFPowI(MachineInstr &MI, BuildFnTy &MatchInfo) {
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auto [Dst, Base, Exp] = MI.getFirst3Regs();
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LLT Ty = MRI.getType(Dst);
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MachineRegisterInfo &MRI = *Builder.getMRI();
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std::optional<int64_t> ConstantExpValue = getIConstantVRegSExtVal(Exp, MRI);
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assert(ConstantExpValue && "matched non-const FPOWI?");
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int64_t OriginalExprVal = *ConstantExpValue;
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int64_t ExpVal = OriginalExprVal;
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if (ExpVal == 0) {
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Builder.buildFConstant(Dst, 1.0);
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MI.removeFromParent();
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return;
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}
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if (ExpVal < 0)
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ExpVal = -ExpVal;
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auto Res = Builder.buildCopy(Ty, Base);
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while (--ExpVal > 0)
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Res = Builder.buildFMul(Ty, Res, Base);
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// If the original was negative, invert the result, producing 1/(x*x*x).
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if (OriginalExprVal < 0)
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Res = Builder.buildFDiv(Ty, Builder.buildFConstant(Ty, 1.0), Res);
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Builder.buildCopy(Dst, Res);
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MI.eraseFromParent();
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}
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bool CombinerHelper::matchSextOfTrunc(const MachineOperand &MO,
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BuildFnTy &MatchInfo) {
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GSext *Sext = cast<GSext>(getDefIgnoringCopies(MO.getReg(), MRI));

‎llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7142,8 +7142,6 @@ LegalizerHelper::lowerFPTRUNC(MachineInstr &MI) {
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return UnableToLegalize;
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}
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// TODO: If RHS is a constant SelectionDAGBuilder expands this into a
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// multiplication tree.
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LegalizerHelper::LegalizeResult LegalizerHelper::lowerFPOWI(MachineInstr &MI) {
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auto [Dst, Src0, Src1] = MI.getFirst3Regs();
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LLT Ty = MRI.getType(Dst);

‎llvm/test/CodeGen/AArch64/GlobalISel/combine-fpowi.mir

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@@ -0,0 +1,127 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -o - -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s
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---
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name: fpowi_s64_zero
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body: |
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bb.0:
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liveins: $d0, $w0
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; CHECK-LABEL: name: fpowi_s64_zero
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; CHECK: liveins: $d0, $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
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; CHECK-NEXT: $d0 = COPY [[C]](s64)
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%0:_(s64) = COPY $d0
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%1:_(s32) = COPY $w0
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%2:_(s32) = G_CONSTANT i32 0
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%3:_(s64) = G_FPOWI %0, %2(s32)
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$d0 = COPY %3(s64)
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...
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---
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name: fpowi_s32_zero
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body: |
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bb.0:
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liveins: $d0, $w0
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; CHECK-LABEL: name: fpowi_s32_zero
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; CHECK: liveins: $d0, $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
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; CHECK-NEXT: $s0 = COPY [[C]](s32)
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%0:_(s32) = COPY $s0
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%1:_(s32) = COPY $w0
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%2:_(s32) = G_CONSTANT i32 0
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%3:_(s32) = G_FPOWI %0, %2(s32)
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$s0 = COPY %3(s32)
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...
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---
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name: fpowi_positive
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body: |
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bb.0:
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liveins: $d0, $w0
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; CHECK-LABEL: name: fpowi_positive
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; CHECK: liveins: $d0, $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[COPY]], [[COPY]]
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; CHECK-NEXT: [[FMUL1:%[0-9]+]]:_(s64) = G_FMUL [[FMUL]], [[COPY]]
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; CHECK-NEXT: [[FMUL2:%[0-9]+]]:_(s64) = G_FMUL [[FMUL1]], [[COPY]]
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; CHECK-NEXT: [[FMUL3:%[0-9]+]]:_(s64) = G_FMUL [[FMUL2]], [[COPY]]
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; CHECK-NEXT: $d0 = COPY [[FMUL3]](s64)
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%0:_(s64) = COPY $d0
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%1:_(s32) = COPY $w0
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%2:_(s32) = G_CONSTANT i32 5
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%3:_(s64) = G_FPOWI %0, %2(s32)
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$d0 = COPY %3(s64)
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...
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---
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name: fpowi_s64_negative
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body: |
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bb.0:
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liveins: $d0, $w0
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; CHECK-LABEL: name: fpowi_s64_negative
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; CHECK: liveins: $d0, $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[COPY]], [[COPY]]
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; CHECK-NEXT: [[FMUL1:%[0-9]+]]:_(s64) = G_FMUL [[FMUL]], [[COPY]]
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; CHECK-NEXT: [[FMUL2:%[0-9]+]]:_(s64) = G_FMUL [[FMUL1]], [[COPY]]
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; CHECK-NEXT: [[FMUL3:%[0-9]+]]:_(s64) = G_FMUL [[FMUL2]], [[COPY]]
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
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; CHECK-NEXT: [[FDIV:%[0-9]+]]:_(s64) = G_FDIV [[C]], [[FMUL3]]
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; CHECK-NEXT: $d0 = COPY [[FDIV]](s64)
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%0:_(s64) = COPY $d0
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%1:_(s32) = COPY $w0
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%2:_(s32) = G_CONSTANT i32 -5
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%3:_(s64) = G_FPOWI %0, %2(s32)
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$d0 = COPY %3(s64)
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...
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---
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name: fpowi_s32_negative
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body: |
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bb.0:
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liveins: $d0, $w0
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; CHECK-LABEL: name: fpowi_s32_negative
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; CHECK: liveins: $d0, $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[COPY]]
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; CHECK-NEXT: [[FMUL1:%[0-9]+]]:_(s32) = G_FMUL [[FMUL]], [[COPY]]
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; CHECK-NEXT: [[FMUL2:%[0-9]+]]:_(s32) = G_FMUL [[FMUL1]], [[COPY]]
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; CHECK-NEXT: [[FMUL3:%[0-9]+]]:_(s32) = G_FMUL [[FMUL2]], [[COPY]]
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
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; CHECK-NEXT: [[FDIV:%[0-9]+]]:_(s32) = G_FDIV [[C]], [[FMUL3]]
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; CHECK-NEXT: $s0 = COPY [[FDIV]](s32)
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%0:_(s32) = COPY $s0
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%1:_(s32) = COPY $w0
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%2:_(s32) = G_CONSTANT i32 -5
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%3:_(s32) = G_FPOWI %0, %2(s32)
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$s0 = COPY %3(s32)
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...
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---
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name: fpowi_libcall
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body: |
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bb.0:
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liveins: $d0, $w0
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; CHECK-LABEL: name: fpowi_libcall
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; CHECK: liveins: $d0, $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK-NEXT: [[FPOWI:%[0-9]+]]:_(s64) = G_FPOWI [[COPY]], [[COPY1]](s32)
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; CHECK-NEXT: $d0 = COPY [[FPOWI]](s64)
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%0:_(s64) = COPY $d0
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%1:_(s32) = COPY $w0
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%2:_(s64) = G_FPOWI %0, %1(s32)
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$d0 = COPY %2(s64)
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...

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