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Thorsten Schütt
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test overflow intrinsics
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‎llvm/test/CodeGen/AArch64/overflow.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=arm64-eabi -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,SDAG
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; RUN: llc < %s -mtriple=arm64-eabi -global-isel -global-isel-abort=2 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,GISEL
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define zeroext i1 @saddo1.i32.unused(i32 %v1, i32 %v2, ptr %res) {
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; CHECK-LABEL: saddo1.i32.unused:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: mov w0, #1 // =0x1
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; CHECK-NEXT: str w8, [x2]
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; CHECK-NEXT: ret
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entry:
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%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
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%obit = extractvalue {i32, i1} %t, 1
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%val = extractvalue {i32, i1} %t, 0
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store i32 %val, ptr %res
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ret i1 1
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}
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define zeroext i1 @saddo1.i32.fold(i32 %v1, i32 %v2, ptr %res) {
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; SDAG-LABEL: saddo1.i32.fold:
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; SDAG: // %bb.0: // %entry
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; SDAG-NEXT: mov w8, #20 // =0x14
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; SDAG-NEXT: mov w0, wzr
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; SDAG-NEXT: str w8, [x2]
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; SDAG-NEXT: ret
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;
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; GISEL-LABEL: saddo1.i32.fold:
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; GISEL: // %bb.0: // %entry
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; GISEL-NEXT: mov w8, #9 // =0x9
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; GISEL-NEXT: adds w8, w8, #11
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; GISEL-NEXT: cset w0, vs
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; GISEL-NEXT: str w8, [x2]
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; GISEL-NEXT: ret
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entry:
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%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 9, i32 11)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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define zeroext i1 @saddo1.i32.addzero(i32 %v1, i32 %v2, ptr %res) {
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; CHECK-LABEL: saddo1.i32.addzero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, w0
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: str w8, [x2]
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; CHECK-NEXT: ret
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entry:
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%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 0)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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define zeroext i1 @uaddo1.i32.addzero(i32 %v1, i32 %v2, ptr %res) {
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; CHECK-LABEL: uaddo1.i32.addzero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, w0
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: str w8, [x2]
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; CHECK-NEXT: ret
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entry:
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 0)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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define i32 @saddo.select.i64(i32 %v1, i32 %v2, i1 %v3, i64 %v4, i64 %v5) {
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; SDAG-LABEL: saddo.select.i64:
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; SDAG: // %bb.0: // %entry
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; SDAG-NEXT: mov w0, w1
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; SDAG-NEXT: ret
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;
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; GISEL-LABEL: saddo.select.i64:
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; GISEL: // %bb.0: // %entry
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; GISEL-NEXT: mov w8, #13 // =0xd
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; GISEL-NEXT: and x9, x3, #0xc
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; GISEL-NEXT: and x8, x4, x8
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; GISEL-NEXT: cmn x9, x8
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; GISEL-NEXT: cset w8, vs
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; GISEL-NEXT: tst w8, #0x1
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; GISEL-NEXT: csel w0, w0, w1, ne
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; GISEL-NEXT: ret
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entry:
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%lhs = and i64 %v4, 12
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%rhs = and i64 %v5, 13
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%t = call {i64, i1} @llvm.sadd.with.overflow.64(i64 %lhs, i64 %rhs)
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%obit = extractvalue {i64, i1} %t, 1
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%ret = select i1 %obit, i32 %v1, i32 %v2
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ret i32 %ret
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}
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define i32 @uaddo.select.i64(i32 %v1, i32 %v2, i1 %v3, i64 %v4, i64 %v5) {
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; SDAG-LABEL: uaddo.select.i64:
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; SDAG: // %bb.0: // %entry
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; SDAG-NEXT: mov w0, w1
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; SDAG-NEXT: ret
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;
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; GISEL-LABEL: uaddo.select.i64:
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; GISEL: // %bb.0: // %entry
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; GISEL-NEXT: mov w8, #9 // =0x9
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; GISEL-NEXT: mov w9, #10 // =0xa
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; GISEL-NEXT: and x8, x3, x8
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; GISEL-NEXT: and x9, x4, x9
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; GISEL-NEXT: cmn x8, x9
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; GISEL-NEXT: cset w8, hs
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; GISEL-NEXT: tst w8, #0x1
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; GISEL-NEXT: csel w0, w0, w1, ne
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; GISEL-NEXT: ret
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entry:
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%lhs = and i64 %v4, 9
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%rhs = and i64 %v5, 10
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%t = call {i64, i1} @llvm.uadd.with.overflow.64(i64 %lhs, i64 %rhs)
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%obit = extractvalue {i64, i1} %t, 1
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%ret = select i1 %obit, i32 %v1, i32 %v2
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ret i32 %ret
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}
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define zeroext i1 @saddo.canon.i32(i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, ptr %res) {
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; SDAG-LABEL: saddo.canon.i32:
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; SDAG: // %bb.0: // %entry
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; SDAG-NEXT: mov w0, wzr
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; SDAG-NEXT: str w4, [x5]
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; SDAG-NEXT: ret
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;
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; GISEL-LABEL: saddo.canon.i32:
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; GISEL: // %bb.0: // %entry
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; GISEL-NEXT: adds w8, wzr, w4
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; GISEL-NEXT: cset w0, vs
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; GISEL-NEXT: str w8, [x5]
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; GISEL-NEXT: ret
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entry:
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%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 0, i32 %v5)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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define zeroext i1 @saddo.add.i32(i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, ptr %res) {
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; CHECK-LABEL: saddo.add.i32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: add w8, w4, #100
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; CHECK-NEXT: subs w8, w8, #100
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; CHECK-NEXT: cset w0, vs
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; CHECK-NEXT: str w8, [x5]
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; CHECK-NEXT: ret
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entry:
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%lhs = add nsw i32 %v5, 100
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%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %lhs, i32 -100)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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define zeroext i1 @uaddo.add.i32(i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, ptr %res) {
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; CHECK-LABEL: uaddo.add.i32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: add w8, w4, #5
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; CHECK-NEXT: adds w8, w8, #5
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; CHECK-NEXT: cset w0, hs
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; CHECK-NEXT: str w8, [x5]
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; CHECK-NEXT: ret
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entry:
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%lhs = add nuw i32 %v5, 5
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %lhs, i32 5)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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define zeroext i1 @uaddo.negative.i32(i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, ptr %res) {
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; CHECK-LABEL: uaddo.negative.i32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adds w8, w3, #5
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; CHECK-NEXT: cset w0, hs
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; CHECK-NEXT: str w8, [x5]
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; CHECK-NEXT: ret
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entry:
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v4, i32 5)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, ptr %res
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ret i1 %obit
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}
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define i32 @saddo.always.i8(i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, ptr %res) {
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; CHECK-LABEL: saddo.always.i8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w0, w1
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; CHECK-NEXT: ret
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entry:
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%t = call {i8, i1} @llvm.sadd.with.overflow.i8(i8 255, i8 254)
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%obit = extractvalue {i8, i1} %t, 1
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%ret = select i1 %obit, i32 %v1, i32 %v2
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ret i32 %ret
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}
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define i32 @uaddo.never.i8(i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, ptr %res) {
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; CHECK-LABEL: uaddo.never.i8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w0, w1
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; CHECK-NEXT: ret
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entry:
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%t = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 2, i8 1)
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%obit = extractvalue {i8, i1} %t, 1
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%ret = select i1 %obit, i32 %v1, i32 %v2
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ret i32 %ret
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}
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declare {i8, i1} @llvm.sadd.with.overflow.i8(i8, i8) nounwind readnone
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declare {i16, i1} @llvm.sadd.with.overflow.i16(i16, i16) nounwind readnone
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declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.sadd.with.overflow.i64(i64, i64) nounwind readnone
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declare {i8, i1} @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone
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declare {i16, i1} @llvm.uadd.with.overflow.i16(i16, i16) nounwind readnone
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declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
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declare {i8, i1} @llvm.ssub.with.overflow.i8(i8, i8) nounwind readnone
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declare {i16, i1} @llvm.ssub.with.overflow.i16(i16, i16) nounwind readnone
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declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone
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declare {i8, i1} @llvm.usub.with.overflow.i8(i8, i8) nounwind readnone
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declare {i16, i1} @llvm.usub.with.overflow.i16(i16, i16) nounwind readnone
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declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone
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declare {i8, i1} @llvm.smul.with.overflow.i8(i8, i8) nounwind readnone
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declare {i16, i1} @llvm.smul.with.overflow.i16(i16, i16) nounwind readnone
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declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
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declare {i8, i1} @llvm.umul.with.overflow.i8(i8, i8) nounwind readnone
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declare {i16, i1} @llvm.umul.with.overflow.i16(i16, i16) nounwind readnone
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declare {i32, i1} @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone

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