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[RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (#107361)
There is no Fmv with Zfinx.
1 parent be427df commit 13013bd

13 files changed

+512
-528
lines changed

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2288,10 +2288,11 @@ bool RISCVTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
22882288
return true;
22892289

22902290
// Building an integer and then converting requires a fmv at the end of
2291-
// the integer sequence.
2291+
// the integer sequence. The fmv is not required for Zfinx.
2292+
const int FmvCost = Subtarget.hasStdExtZfinx() ? 0 : 1;
22922293
const int Cost =
2293-
1 + RISCVMatInt::getIntMatCost(Imm.bitcastToAPInt(), Subtarget.getXLen(),
2294-
Subtarget);
2294+
FmvCost + RISCVMatInt::getIntMatCost(Imm.bitcastToAPInt(),
2295+
Subtarget.getXLen(), Subtarget);
22952296
return Cost <= FPImmCost;
22962297
}
22972298

llvm/test/CodeGen/RISCV/double-convert.ll

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1668,16 +1668,16 @@ define signext i16 @fcvt_w_s_sat_i16(double %a) nounwind {
16681668
;
16691669
; RV64IZFINXZDINX-LABEL: fcvt_w_s_sat_i16:
16701670
; RV64IZFINXZDINX: # %bb.0: # %start
1671-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI26_0)
1672-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI26_0)(a1)
1673-
; RV64IZFINXZDINX-NEXT: lui a2, %hi(.LCPI26_1)
1674-
; RV64IZFINXZDINX-NEXT: ld a2, %lo(.LCPI26_1)(a2)
1675-
; RV64IZFINXZDINX-NEXT: feq.d a3, a0, a0
1676-
; RV64IZFINXZDINX-NEXT: neg a3, a3
1677-
; RV64IZFINXZDINX-NEXT: fmax.d a0, a0, a1
1671+
; RV64IZFINXZDINX-NEXT: feq.d a1, a0, a0
1672+
; RV64IZFINXZDINX-NEXT: neg a1, a1
1673+
; RV64IZFINXZDINX-NEXT: lui a2, %hi(.LCPI26_0)
1674+
; RV64IZFINXZDINX-NEXT: ld a2, %lo(.LCPI26_0)(a2)
1675+
; RV64IZFINXZDINX-NEXT: li a3, -505
1676+
; RV64IZFINXZDINX-NEXT: slli a3, a3, 53
1677+
; RV64IZFINXZDINX-NEXT: fmax.d a0, a0, a3
16781678
; RV64IZFINXZDINX-NEXT: fmin.d a0, a0, a2
16791679
; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a0, rtz
1680-
; RV64IZFINXZDINX-NEXT: and a0, a3, a0
1680+
; RV64IZFINXZDINX-NEXT: and a0, a1, a0
16811681
; RV64IZFINXZDINX-NEXT: ret
16821682
;
16831683
; RV32I-LABEL: fcvt_w_s_sat_i16:
@@ -2043,16 +2043,16 @@ define signext i8 @fcvt_w_s_sat_i8(double %a) nounwind {
20432043
;
20442044
; RV64IZFINXZDINX-LABEL: fcvt_w_s_sat_i8:
20452045
; RV64IZFINXZDINX: # %bb.0: # %start
2046-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI30_0)
2047-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI30_0)(a1)
2048-
; RV64IZFINXZDINX-NEXT: lui a2, %hi(.LCPI30_1)
2049-
; RV64IZFINXZDINX-NEXT: ld a2, %lo(.LCPI30_1)(a2)
2050-
; RV64IZFINXZDINX-NEXT: feq.d a3, a0, a0
2051-
; RV64IZFINXZDINX-NEXT: neg a3, a3
2052-
; RV64IZFINXZDINX-NEXT: fmax.d a0, a0, a1
2046+
; RV64IZFINXZDINX-NEXT: feq.d a1, a0, a0
2047+
; RV64IZFINXZDINX-NEXT: neg a1, a1
2048+
; RV64IZFINXZDINX-NEXT: li a2, -509
2049+
; RV64IZFINXZDINX-NEXT: slli a2, a2, 53
2050+
; RV64IZFINXZDINX-NEXT: fmax.d a0, a0, a2
2051+
; RV64IZFINXZDINX-NEXT: lui a2, 65919
2052+
; RV64IZFINXZDINX-NEXT: slli a2, a2, 34
20532053
; RV64IZFINXZDINX-NEXT: fmin.d a0, a0, a2
20542054
; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a0, rtz
2055-
; RV64IZFINXZDINX-NEXT: and a0, a3, a0
2055+
; RV64IZFINXZDINX-NEXT: and a0, a1, a0
20562056
; RV64IZFINXZDINX-NEXT: ret
20572057
;
20582058
; RV32I-LABEL: fcvt_w_s_sat_i8:
@@ -2234,9 +2234,9 @@ define zeroext i8 @fcvt_wu_s_sat_i8(double %a) nounwind {
22342234
;
22352235
; RV64IZFINXZDINX-LABEL: fcvt_wu_s_sat_i8:
22362236
; RV64IZFINXZDINX: # %bb.0: # %start
2237-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI32_0)
2238-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI32_0)(a1)
22392237
; RV64IZFINXZDINX-NEXT: fmax.d a0, a0, zero
2238+
; RV64IZFINXZDINX-NEXT: lui a1, 131967
2239+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 33
22402240
; RV64IZFINXZDINX-NEXT: fmin.d a0, a0, a1
22412241
; RV64IZFINXZDINX-NEXT: fcvt.lu.d a0, a0, rtz
22422242
; RV64IZFINXZDINX-NEXT: ret

llvm/test/CodeGen/RISCV/double-imm.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -62,8 +62,8 @@ define double @double_imm_op(double %a) nounwind {
6262
;
6363
; CHECKRV64ZDINX-LABEL: double_imm_op:
6464
; CHECKRV64ZDINX: # %bb.0:
65-
; CHECKRV64ZDINX-NEXT: lui a1, %hi(.LCPI1_0)
66-
; CHECKRV64ZDINX-NEXT: ld a1, %lo(.LCPI1_0)(a1)
65+
; CHECKRV64ZDINX-NEXT: li a1, 1023
66+
; CHECKRV64ZDINX-NEXT: slli a1, a1, 52
6767
; CHECKRV64ZDINX-NEXT: fadd.d a0, a0, a1
6868
; CHECKRV64ZDINX-NEXT: ret
6969
%1 = fadd double %a, 1.0

llvm/test/CodeGen/RISCV/double-intrinsics.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -869,8 +869,8 @@ define double @floor_f64(double %a) nounwind {
869869
;
870870
; RV64IZFINXZDINX-LABEL: floor_f64:
871871
; RV64IZFINXZDINX: # %bb.0:
872-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI17_0)
873-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI17_0)(a1)
872+
; RV64IZFINXZDINX-NEXT: li a1, 1075
873+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
874874
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
875875
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
876876
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB17_2
@@ -934,8 +934,8 @@ define double @ceil_f64(double %a) nounwind {
934934
;
935935
; RV64IZFINXZDINX-LABEL: ceil_f64:
936936
; RV64IZFINXZDINX: # %bb.0:
937-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI18_0)
938-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI18_0)(a1)
937+
; RV64IZFINXZDINX-NEXT: li a1, 1075
938+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
939939
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
940940
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
941941
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB18_2
@@ -999,8 +999,8 @@ define double @trunc_f64(double %a) nounwind {
999999
;
10001000
; RV64IZFINXZDINX-LABEL: trunc_f64:
10011001
; RV64IZFINXZDINX: # %bb.0:
1002-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI19_0)
1003-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI19_0)(a1)
1002+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1003+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
10041004
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
10051005
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
10061006
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB19_2
@@ -1064,8 +1064,8 @@ define double @rint_f64(double %a) nounwind {
10641064
;
10651065
; RV64IZFINXZDINX-LABEL: rint_f64:
10661066
; RV64IZFINXZDINX: # %bb.0:
1067-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI20_0)
1068-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI20_0)(a1)
1067+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1068+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
10691069
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
10701070
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
10711071
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB20_2
@@ -1170,8 +1170,8 @@ define double @round_f64(double %a) nounwind {
11701170
;
11711171
; RV64IZFINXZDINX-LABEL: round_f64:
11721172
; RV64IZFINXZDINX: # %bb.0:
1173-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI22_0)
1174-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI22_0)(a1)
1173+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1174+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
11751175
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
11761176
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
11771177
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB22_2
@@ -1235,8 +1235,8 @@ define double @roundeven_f64(double %a) nounwind {
12351235
;
12361236
; RV64IZFINXZDINX-LABEL: roundeven_f64:
12371237
; RV64IZFINXZDINX: # %bb.0:
1238-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI23_0)
1239-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI23_0)(a1)
1238+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1239+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
12401240
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
12411241
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
12421242
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB23_2

llvm/test/CodeGen/RISCV/double-round-conv.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1130,8 +1130,8 @@ define double @test_floor_double(double %x) {
11301130
;
11311131
; RV64IZFINXZDINX-LABEL: test_floor_double:
11321132
; RV64IZFINXZDINX: # %bb.0:
1133-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI40_0)
1134-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI40_0)(a1)
1133+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1134+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
11351135
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
11361136
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
11371137
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB40_2
@@ -1177,8 +1177,8 @@ define double @test_ceil_double(double %x) {
11771177
;
11781178
; RV64IZFINXZDINX-LABEL: test_ceil_double:
11791179
; RV64IZFINXZDINX: # %bb.0:
1180-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI41_0)
1181-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI41_0)(a1)
1180+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1181+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
11821182
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
11831183
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
11841184
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB41_2
@@ -1224,8 +1224,8 @@ define double @test_trunc_double(double %x) {
12241224
;
12251225
; RV64IZFINXZDINX-LABEL: test_trunc_double:
12261226
; RV64IZFINXZDINX: # %bb.0:
1227-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI42_0)
1228-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI42_0)(a1)
1227+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1228+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
12291229
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
12301230
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
12311231
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB42_2
@@ -1271,8 +1271,8 @@ define double @test_round_double(double %x) {
12711271
;
12721272
; RV64IZFINXZDINX-LABEL: test_round_double:
12731273
; RV64IZFINXZDINX: # %bb.0:
1274-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI43_0)
1275-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI43_0)(a1)
1274+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1275+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
12761276
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
12771277
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
12781278
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB43_2
@@ -1318,8 +1318,8 @@ define double @test_roundeven_double(double %x) {
13181318
;
13191319
; RV64IZFINXZDINX-LABEL: test_roundeven_double:
13201320
; RV64IZFINXZDINX: # %bb.0:
1321-
; RV64IZFINXZDINX-NEXT: lui a1, %hi(.LCPI44_0)
1322-
; RV64IZFINXZDINX-NEXT: ld a1, %lo(.LCPI44_0)(a1)
1321+
; RV64IZFINXZDINX-NEXT: li a1, 1075
1322+
; RV64IZFINXZDINX-NEXT: slli a1, a1, 52
13231323
; RV64IZFINXZDINX-NEXT: fabs.d a2, a0
13241324
; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1
13251325
; RV64IZFINXZDINX-NEXT: beqz a1, .LBB44_2

llvm/test/CodeGen/RISCV/float-convert.ll

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -682,8 +682,8 @@ define i64 @fcvt_l_s_sat(float %a) nounwind {
682682
; RV32IZFINX-NEXT: # %bb.1: # %start
683683
; RV32IZFINX-NEXT: mv a2, a1
684684
; RV32IZFINX-NEXT: .LBB12_2: # %start
685-
; RV32IZFINX-NEXT: lui a1, %hi(.LCPI12_0)
686-
; RV32IZFINX-NEXT: lw a1, %lo(.LCPI12_0)(a1)
685+
; RV32IZFINX-NEXT: lui a1, 389120
686+
; RV32IZFINX-NEXT: addi a1, a1, -1
687687
; RV32IZFINX-NEXT: flt.s a3, a1, s0
688688
; RV32IZFINX-NEXT: beqz a3, .LBB12_4
689689
; RV32IZFINX-NEXT: # %bb.3:
@@ -910,9 +910,9 @@ define i64 @fcvt_lu_s_sat(float %a) nounwind {
910910
; RV32IZFINX-NEXT: neg s1, a0
911911
; RV32IZFINX-NEXT: mv a0, s0
912912
; RV32IZFINX-NEXT: call __fixunssfdi
913-
; RV32IZFINX-NEXT: lui a2, %hi(.LCPI14_0)
914-
; RV32IZFINX-NEXT: lw a2, %lo(.LCPI14_0)(a2)
915913
; RV32IZFINX-NEXT: and a0, s1, a0
914+
; RV32IZFINX-NEXT: lui a2, 391168
915+
; RV32IZFINX-NEXT: addi a2, a2, -1
916916
; RV32IZFINX-NEXT: flt.s a2, a2, s0
917917
; RV32IZFINX-NEXT: neg a2, a2
918918
; RV32IZFINX-NEXT: or a0, a2, a0
@@ -1445,11 +1445,11 @@ define signext i16 @fcvt_w_s_sat_i16(float %a) nounwind {
14451445
; RV32IZFINX-LABEL: fcvt_w_s_sat_i16:
14461446
; RV32IZFINX: # %bb.0: # %start
14471447
; RV32IZFINX-NEXT: feq.s a1, a0, a0
1448-
; RV32IZFINX-NEXT: lui a2, %hi(.LCPI24_0)
1449-
; RV32IZFINX-NEXT: lw a2, %lo(.LCPI24_0)(a2)
14501448
; RV32IZFINX-NEXT: neg a1, a1
1451-
; RV32IZFINX-NEXT: lui a3, 815104
1452-
; RV32IZFINX-NEXT: fmax.s a0, a0, a3
1449+
; RV32IZFINX-NEXT: lui a2, 815104
1450+
; RV32IZFINX-NEXT: fmax.s a0, a0, a2
1451+
; RV32IZFINX-NEXT: lui a2, 290816
1452+
; RV32IZFINX-NEXT: addi a2, a2, -512
14531453
; RV32IZFINX-NEXT: fmin.s a0, a0, a2
14541454
; RV32IZFINX-NEXT: fcvt.w.s a0, a0, rtz
14551455
; RV32IZFINX-NEXT: and a0, a1, a0
@@ -1458,11 +1458,11 @@ define signext i16 @fcvt_w_s_sat_i16(float %a) nounwind {
14581458
; RV64IZFINX-LABEL: fcvt_w_s_sat_i16:
14591459
; RV64IZFINX: # %bb.0: # %start
14601460
; RV64IZFINX-NEXT: feq.s a1, a0, a0
1461-
; RV64IZFINX-NEXT: lui a2, %hi(.LCPI24_0)
1462-
; RV64IZFINX-NEXT: lw a2, %lo(.LCPI24_0)(a2)
14631461
; RV64IZFINX-NEXT: neg a1, a1
1464-
; RV64IZFINX-NEXT: lui a3, 815104
1465-
; RV64IZFINX-NEXT: fmax.s a0, a0, a3
1462+
; RV64IZFINX-NEXT: lui a2, 815104
1463+
; RV64IZFINX-NEXT: fmax.s a0, a0, a2
1464+
; RV64IZFINX-NEXT: lui a2, 290816
1465+
; RV64IZFINX-NEXT: addiw a2, a2, -512
14661466
; RV64IZFINX-NEXT: fmin.s a0, a0, a2
14671467
; RV64IZFINX-NEXT: fcvt.l.s a0, a0, rtz
14681468
; RV64IZFINX-NEXT: and a0, a1, a0
@@ -1622,18 +1622,18 @@ define zeroext i16 @fcvt_wu_s_sat_i16(float %a) nounwind {
16221622
;
16231623
; RV32IZFINX-LABEL: fcvt_wu_s_sat_i16:
16241624
; RV32IZFINX: # %bb.0: # %start
1625-
; RV32IZFINX-NEXT: lui a1, %hi(.LCPI26_0)
1626-
; RV32IZFINX-NEXT: lw a1, %lo(.LCPI26_0)(a1)
16271625
; RV32IZFINX-NEXT: fmax.s a0, a0, zero
1626+
; RV32IZFINX-NEXT: lui a1, 292864
1627+
; RV32IZFINX-NEXT: addi a1, a1, -256
16281628
; RV32IZFINX-NEXT: fmin.s a0, a0, a1
16291629
; RV32IZFINX-NEXT: fcvt.wu.s a0, a0, rtz
16301630
; RV32IZFINX-NEXT: ret
16311631
;
16321632
; RV64IZFINX-LABEL: fcvt_wu_s_sat_i16:
16331633
; RV64IZFINX: # %bb.0: # %start
1634-
; RV64IZFINX-NEXT: lui a1, %hi(.LCPI26_0)
1635-
; RV64IZFINX-NEXT: lw a1, %lo(.LCPI26_0)(a1)
16361634
; RV64IZFINX-NEXT: fmax.s a0, a0, zero
1635+
; RV64IZFINX-NEXT: lui a1, 292864
1636+
; RV64IZFINX-NEXT: addiw a1, a1, -256
16371637
; RV64IZFINX-NEXT: fmin.s a0, a0, a1
16381638
; RV64IZFINX-NEXT: fcvt.lu.s a0, a0, rtz
16391639
; RV64IZFINX-NEXT: ret

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