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[RISCV] Remove duplicate WriteRes<WriteJalr for MIPSP8700. (#123865)
We had two WriteRes for WriteJalr with difference latencies. Drop the duplicate and change the latency of Jal to 1 based on review feedback
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llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td

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@@ -125,11 +125,8 @@ def : WriteRes<WriteCSR, [p8700ALQ]>;
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// Handle CTI Pipeline.
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def : WriteRes<WriteJmp, [p8700IssueCTI]>;
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def : WriteRes<WriteJalr, [p8700IssueCTI]>;
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let Latency = 2 in {
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def : WriteRes<WriteJal, [p8700IssueCTI]>;
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def : WriteRes<WriteJalr, [p8700IssueCTI]>;
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}
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// Handle FPU Pipelines.
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def p8700FPQ : ProcResource<3> { let BufferSize = 16; }

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