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[AArch64] Add new feature +sme-mop4 and +sme-tmop
The 2024-12 ISA spec release[1] add these features: FEAT_SME_MOP4(sme-mop4) to enable SME Quarter-tile outer product instructions and FEAT_SME_TMOP(sme-tmop) to enable SME Structured sparsity outer product instructions to allow these instructions to be available outside Armv9.6/sme2p2 [1] https://developer.arm.com/Architectures/A-Profile%20Architecture#Downloads
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‎clang/test/Driver/print-supported-extensions-aarch64.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,8 @@
5151
// CHECK-NEXT: pcdphint FEAT_PCDPHINT Enable Armv9.6-A Producer Consumer Data Placement hints
5252
// CHECK-NEXT: pmuv3 FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension
5353
// CHECK-NEXT: pops FEAT_PoPS Enable Armv9.6-A Point Of Physical Storage (PoPS) DC instructions
54+
// CHECK-NEXT: sme-mop4 FEAT_SME_MOP4 Enable SME Quarter-tile outer product instructions
55+
// CHECK-NEXT: sme-tmop FEAT_SME_TMOP Enable SME Structured sparsity outer product instructions
5456
// CHECK-NEXT: predres FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
5557
// CHECK-NEXT: rng FEAT_RNG Enable Random Number generation instructions
5658
// CHECK-NEXT: ras FEAT_RAS, FEAT_RASv1p1 Enable Armv8.0-A Reliability, Availability and Serviceability Extensions

‎llvm/lib/Target/AArch64/AArch64.td

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,8 @@ def SVEUnsupported : AArch64Unsupported {
7474
}
7575

7676
let F = [HasSME2p2, HasSVE2p2orSME2p2, HasNonStreamingSVEorSME2p2,
77-
HasNonStreamingSVE2p2orSME2p2, HasNonStreamingSVE2orSSVE_BitPerm] in
77+
HasNonStreamingSVE2p2orSME2p2, HasNonStreamingSVE2orSSVE_BitPerm,
78+
HasSME2p2orSME_MOP4, HasSME2p2orSME_TMOP] in
7879
def SME2p2Unsupported : AArch64Unsupported;
7980

8081
def SME2p1Unsupported : AArch64Unsupported {

‎llvm/lib/Target/AArch64/AArch64Features.td

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -570,6 +570,12 @@ def FeaturePoPS: ExtensionWithMArch<"pops", "PoPS", "FEAT_PoPS",
570570
def FeatureSSVE_BitPerm : ExtensionWithMArch<"ssve-bitperm", "SSVE_BitPerm", "FEAT_SSVE_BitPerm",
571571
"Enable Armv9.6-A SVE BitPerm support in streaming SVE mode", [FeatureSME2, FeatureSVEBitPerm]>;
572572

573+
def FeatureSME_MOP4: ExtensionWithMArch<"sme-mop4", "SME_MOP4", "FEAT_SME_MOP4",
574+
"Enable SME Quarter-tile outer product instructions", [FeatureSME2]>;
575+
576+
def FeatureSME_TMOP: ExtensionWithMArch<"sme-tmop", "SME_TMOP", "FEAT_SME_TMOP",
577+
"Enable SME Structured sparsity outer product instructions.", [FeatureSME2]>;
578+
573579
//===----------------------------------------------------------------------===//
574580
// Other Features
575581
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -290,6 +290,14 @@ def HasNonStreamingSVE2orSSVE_BitPerm
290290
: Predicate<"(Subtarget->isSVEAvailable() && Subtarget->hasSVE2()) ||"
291291
"(Subtarget->isSVEorStreamingSVEAvailable() && Subtarget->hasSSVE_BitPerm())">,
292292
AssemblerPredicateWithAll<(any_of FeatureSVE2, FeatureSSVE_BitPerm), "sve2 or ssve-bitperm">;
293+
def HasSME2p2orSME_MOP4
294+
: Predicate<"(Subtarget->isStreaming() &&"
295+
"(Subtarget->hasSME2p2() || Subtarget->hasSME_MOP4()))">,
296+
AssemblerPredicateWithAll<(any_of FeatureSME2p2, FeatureSME_MOP4), "sme2p2 or sme-mop4">;
297+
def HasSME2p2orSME_TMOP
298+
: Predicate<"(Subtarget->isStreaming() &&"
299+
"(Subtarget->hasSME2p2()) || Subtarget->hasSME_TMOP()))">,
300+
AssemblerPredicateWithAll<(any_of FeatureSME2p2, FeatureSME_TMOP), "sme2p2 or sme-tmop">;
293301

294302
// A subset of NEON instructions are legal in Streaming SVE execution mode,
295303
// so don't need the additional check for 'isNeonAvailable'.

‎llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td

Lines changed: 32 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@ defm USMOPA_MPPZZ_D : sme_int_outer_product_i64<0b100, "usmopa", int_aarch64_sme
147147
defm USMOPS_MPPZZ_D : sme_int_outer_product_i64<0b101, "usmops", int_aarch64_sme_usmops_wide>;
148148
}
149149

150-
let Predicates = [HasSME2p2] in {
150+
let Predicates = [HasSME2p2orSME_MOP4] in {
151151
defm SMOP4A : sme_quarter_outer_product_i8_i32<0b0, 0b0, 0b0, "smop4a">;
152152
defm SMOP4S : sme_quarter_outer_product_i8_i32<0b0, 0b0, 0b1, "smop4s">;
153153
defm SUMOP4A : sme_quarter_outer_product_i8_i32<0b0, 0b1, 0b0, "sumop4a">;
@@ -163,7 +163,7 @@ let Predicates = [HasSME2p2] in {
163163
defm UMOP4S : sme_quarter_outer_product_i16_i32<0b1, 0b1, "umop4s">;
164164
}
165165

166-
let Predicates = [HasSME2p2, HasSMEI16I64] in {
166+
let Predicates = [HasSME2p2orSME_MOP4, HasSMEI16I64] in {
167167
defm SMOP4A : sme_quarter_outer_product_i64<0b0, 0b0, 0b0, "smop4a">;
168168
defm SMOP4S : sme_quarter_outer_product_i64<0b0, 0b0, 0b1, "smop4s">;
169169
defm SUMOP4A : sme_quarter_outer_product_i64<0b0, 0b1, 0b0, "sumop4a">;
@@ -174,7 +174,7 @@ let Predicates = [HasSME2p2, HasSMEI16I64] in {
174174
defm USMOP4S : sme_quarter_outer_product_i64<0b1, 0b0, 0b1, "usmop4s">;
175175
}
176176

177-
let Predicates = [HasSME2p2] in {
177+
let Predicates = [HasSME2p2orSME_TMOP] in {
178178
def STMOPA_M2ZZZI_BtoS : sme_int_sparse_outer_product_i32<0b00100, ZZ_b_mul_r, ZPR8, "stmopa">;
179179
def STMOPA_M2ZZZI_HtoS : sme_int_sparse_outer_product_i32<0b00101, ZZ_h_mul_r, ZPR16, "stmopa">;
180180
def UTMOPA_M2ZZZI_BtoS : sme_int_sparse_outer_product_i32<0b11100, ZZ_b_mul_r, ZPR8, "utmopa">;
@@ -1053,41 +1053,52 @@ let Predicates = [HasSME2, HasSVEBFSCALE] in {
10531053
defm BFSCALE : sme2_bfscale_multi<"bfscale">;
10541054
}
10551055

1056-
let Predicates = [HasSME2p2] in {
1056+
let Predicates = [HasSME2p2orSME_MOP4] in {
1057+
defm BFMOP4A : sme2_bfmop4as_widening<0, "bfmop4a">;
1058+
defm BFMOP4S : sme2_bfmop4as_widening<1, "bfmop4s">;
1059+
1060+
defm FMOP4A : sme2_fmop4as_fp16_fp32_widening<0, "fmop4a">;
1061+
defm FMOP4S : sme2_fmop4as_fp16_fp32_widening<1, "fmop4s">;
1062+
1063+
defm FMOP4A : sme2_fmop4as_fp32_non_widening<0, "fmop4a">;
1064+
defm FMOP4S : sme2_fmop4as_fp32_non_widening<1, "fmop4s">;
1065+
}
1066+
1067+
let Predicates = [HasSME2p2orSME_TMOP] in {
10571068
def FTMOPA_M2ZZZI_HtoS : sme_tmopa_32b<0b11000, ZZ_h_mul_r, ZPR16, "ftmopa">;
10581069
def FTMOPA_M2ZZZI_StoS : sme_tmopa_32b<0b00000, ZZ_s_mul_r, ZPR32, "ftmopa">;
10591070
def BFTMOPA_M2ZZZI_HtoS : sme_tmopa_32b<0b10000, ZZ_h_mul_r, ZPR16, "bftmopa">;
1071+
}
10601072

1061-
defm BFMOP4A : sme2_bfmop4as_widening<0, "bfmop4a">;
1062-
defm BFMOP4S : sme2_bfmop4as_widening<1, "bfmop4s">;
1063-
1073+
let Predicates = [HasSME2p2] in {
10641074
defm FMUL_2ZZ : sme2_multi2_fmul_sm<"fmul">;
10651075
defm FMUL_2Z2Z : sme2_multi2_fmul_mm< "fmul">;
10661076
defm FMUL_4ZZ : sme2_multi4_fmul_sm<"fmul">;
10671077
defm FMUL_4Z4Z : sme2_multi4_fmul_mm< "fmul">;
10681078

1069-
defm FMOP4A : sme2_fmop4as_fp32_non_widening<0, "fmop4a">;
1070-
defm FMOP4S : sme2_fmop4as_fp32_non_widening<1, "fmop4s">;
1071-
1072-
defm FMOP4A : sme2_fmop4as_fp16_fp32_widening<0, "fmop4a">;
1073-
defm FMOP4S : sme2_fmop4as_fp16_fp32_widening<1, "fmop4s">;
1074-
}
1079+
} // [HasSME2p2]
10751080

1076-
let Predicates = [HasSME2p2, HasSMEB16B16] in {
1081+
let Predicates = [HasSME2p2orSME_TMOP, HasSMEB16B16] in {
10771082
def BFTMOPA_M2ZZZI_HtoH : sme_tmopa_16b<0b11001, ZZ_h_mul_r, ZPR16, "bftmopa">;
10781083
}
10791084

1080-
let Predicates = [HasSME2p2, HasSMEF8F32], Uses = [FPMR, FPCR] in {
1085+
let Predicates = [HasSME2p2orSME_TMOP, HasSMEF8F32], Uses = [FPMR, FPCR] in {
10811086
def FTMOPA_M2ZZZI_BtoS : sme_tmopa_32b<0b01000, ZZ_b_mul_r, ZPR8, "ftmopa">;
1082-
}
1087+
}
10831088

1084-
let Predicates = [HasSME2p2, HasSMEF8F16], Uses = [FPMR, FPCR] in {
1089+
let Predicates = [HasSME2p2orSME_TMOP, HasSMEF8F16], Uses = [FPMR, FPCR] in {
10851090
def FTMOPA_M2ZZZI_BtoH : sme_tmopa_16b<0b01001, ZZ_b_mul_r, ZPR8, "ftmopa">;
1091+
}
1092+
1093+
let Predicates = [HasSME2p2orSME_MOP4, HasSMEF8F16], Uses = [FPMR, FPCR] in {
10861094
defm FMOP4A : sme2_fmop4a_fp8_fp16_2way<"fmop4a">;
10871095
}
10881096

1089-
let Predicates = [HasSME2p2, HasSMEF16F16] in {
1097+
let Predicates = [HasSME2p2orSME_TMOP, HasSMEF16F16] in {
10901098
def FTMOPA_M2ZZZI_HtoH : sme_tmopa_16b<0b10001, ZZ_h_mul_r, ZPR16, "ftmopa">;
1099+
}
1100+
1101+
let Predicates = [HasSME2p2orSME_MOP4, HasSMEF16F16] in {
10911102
defm FMOP4A : sme2_fmop4as_fp16_non_widening<0, "fmop4a">;
10921103
defm FMOP4S : sme2_fmop4as_fp16_non_widening<1, "fmop4s">;
10931104
}
@@ -1098,17 +1109,17 @@ let Predicates = [HasSME2, HasSVEBFSCALE] in {
10981109
}
10991110

11001111
let Uses = [FPMR, FPCR] in {
1101-
let Predicates = [HasSME2p2, HasSMEF8F32] in {
1112+
let Predicates = [HasSME2p2orSME_MOP4, HasSMEF8F32] in {
11021113
defm FMOP4A : sme2_fmop4a_fp8_fp32_4way<"fmop4a">;
11031114
}
11041115
}
11051116

1106-
let Predicates = [HasSME2p2, HasSMEB16B16] in {
1117+
let Predicates = [HasSME2p2orSME_MOP4, HasSMEB16B16] in {
11071118
defm BFMOP4A : sme2_bfmop4as_non_widening<0, "bfmop4a">;
11081119
defm BFMOP4S : sme2_bfmop4as_non_widening<1, "bfmop4s">;
11091120
}
11101121

1111-
let Predicates = [HasSME2p2, HasSMEF64F64] in {
1122+
let Predicates = [HasSME2p2orSME_MOP4, HasSMEF64F64] in {
11121123
defm FMOP4A : sme2_fmop4as_fp64_non_widening<0, "fmop4a">;
11131124
defm FMOP4S : sme2_fmop4as_fp64_non_widening<1, "fmop4s">;
11141125
}

‎llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3831,6 +3831,8 @@ static const struct Extension {
38313831
{"occmo", {AArch64::FeatureOCCMO}},
38323832
{"pcdphint", {AArch64::FeaturePCDPHINT}},
38333833
{"ssve-bitperm", {AArch64::FeatureSSVE_BitPerm}},
3834+
{"sme-mop4", {AArch64::FeatureSME_MOP4}},
3835+
{"sme-tmop", {AArch64::FeatureSME_TMOP}},
38343836
};
38353837

38363838
static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) {

‎llvm/test/MC/AArch64/SME2p2/bfmop4as-non-widening.s

Lines changed: 26 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
11
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p2,+sme-b16b16 < %s \
22
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-mop4,+sme-b16b16 < %s \
4+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
35
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
46
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
57
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p2,+sme-b16b16 < %s \
@@ -19,79 +21,79 @@
1921
bfmop4a za0.h, z0.h, z16.h // 10000001-00100000-00000000-00001000
2022
// CHECK-INST: bfmop4a za0.h, z0.h, z16.h
2123
// CHECK-ENCODING: [0x08,0x00,0x20,0x81]
22-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
24+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
2325
// CHECK-UNKNOWN: 81200008 <unknown>
2426

2527
bfmop4a za1.h, z12.h, z24.h // 10000001-00101000-00000001-10001001
2628
// CHECK-INST: bfmop4a za1.h, z12.h, z24.h
2729
// CHECK-ENCODING: [0x89,0x01,0x28,0x81]
28-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
30+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
2931
// CHECK-UNKNOWN: 81280189 <unknown>
3032

3133
bfmop4a za1.h, z14.h, z30.h // 10000001-00101110-00000001-11001001
3234
// CHECK-INST: bfmop4a za1.h, z14.h, z30.h
3335
// CHECK-ENCODING: [0xc9,0x01,0x2e,0x81]
34-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
36+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
3537
// CHECK-UNKNOWN: 812e01c9 <unknown>
3638

3739
// Single and multiple vectors
3840

3941
bfmop4a za0.h, z0.h, {z16.h-z17.h} // 10000001-00110000-00000000-00001000
4042
// CHECK-INST: bfmop4a za0.h, z0.h, { z16.h, z17.h }
4143
// CHECK-ENCODING: [0x08,0x00,0x30,0x81]
42-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
44+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
4345
// CHECK-UNKNOWN: 81300008 <unknown>
4446

4547
bfmop4a za1.h, z12.h, {z24.h-z25.h} // 10000001-00111000-00000001-10001001
4648
// CHECK-INST: bfmop4a za1.h, z12.h, { z24.h, z25.h }
4749
// CHECK-ENCODING: [0x89,0x01,0x38,0x81]
48-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
50+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
4951
// CHECK-UNKNOWN: 81380189 <unknown>
5052

5153
bfmop4a za1.h, z14.h, {z30.h-z31.h} // 10000001-00111110-00000001-11001001
5254
// CHECK-INST: bfmop4a za1.h, z14.h, { z30.h, z31.h }
5355
// CHECK-ENCODING: [0xc9,0x01,0x3e,0x81]
54-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
56+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
5557
// CHECK-UNKNOWN: 813e01c9 <unknown>
5658

5759
// Multiple and single vectors
5860

5961
bfmop4a za0.h, {z0.h-z1.h}, z16.h // 10000001-00100000-00000010-00001000
6062
// CHECK-INST: bfmop4a za0.h, { z0.h, z1.h }, z16.h
6163
// CHECK-ENCODING: [0x08,0x02,0x20,0x81]
62-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
64+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
6365
// CHECK-UNKNOWN: 81200208 <unknown>
6466

6567
bfmop4a za1.h, {z12.h-z13.h}, z24.h // 10000001-00101000-00000011-10001001
6668
// CHECK-INST: bfmop4a za1.h, { z12.h, z13.h }, z24.h
6769
// CHECK-ENCODING: [0x89,0x03,0x28,0x81]
68-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
70+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
6971
// CHECK-UNKNOWN: 81280389 <unknown>
7072

7173
bfmop4a za1.h, {z14.h-z15.h}, z30.h // 10000001-00101110-00000011-11001001
7274
// CHECK-INST: bfmop4a za1.h, { z14.h, z15.h }, z30.h
7375
// CHECK-ENCODING: [0xc9,0x03,0x2e,0x81]
74-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
76+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
7577
// CHECK-UNKNOWN: 812e03c9 <unknown>
7678

7779
// Multiple vectors
7880

7981
bfmop4a za0.h, {z0.h-z1.h}, {z16.h-z17.h} // 10000001-00110000-00000010-00001000
8082
// CHECK-INST: bfmop4a za0.h, { z0.h, z1.h }, { z16.h, z17.h }
8183
// CHECK-ENCODING: [0x08,0x02,0x30,0x81]
82-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
84+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
8385
// CHECK-UNKNOWN: 81300208 <unknown>
8486

8587
bfmop4a za1.h, {z12.h-z13.h}, {z24.h-z25.h} // 10000001-00111000-00000011-10001001
8688
// CHECK-INST: bfmop4a za1.h, { z12.h, z13.h }, { z24.h, z25.h }
8789
// CHECK-ENCODING: [0x89,0x03,0x38,0x81]
88-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
90+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
8991
// CHECK-UNKNOWN: 81380389 <unknown>
9092

9193
bfmop4a za1.h, {z14.h-z15.h}, {z30.h-z31.h} // 10000001-00111110-00000011-11001001
9294
// CHECK-INST: bfmop4a za1.h, { z14.h, z15.h }, { z30.h, z31.h }
9395
// CHECK-ENCODING: [0xc9,0x03,0x3e,0x81]
94-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
96+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
9597
// CHECK-UNKNOWN: 813e03c9 <unknown>
9698

9799

@@ -102,77 +104,77 @@ bfmop4a za1.h, {z14.h-z15.h}, {z30.h-z31.h} // 10000001-00111110-00000011-11001
102104
bfmop4s za0.h, z0.h, z16.h // 10000001-00100000-00000000-00011000
103105
// CHECK-INST: bfmop4s za0.h, z0.h, z16.h
104106
// CHECK-ENCODING: [0x18,0x00,0x20,0x81]
105-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
107+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
106108
// CHECK-UNKNOWN: 81200018 <unknown>
107109

108110
bfmop4s za1.h, z12.h, z24.h // 10000001-00101000-00000001-10011001
109111
// CHECK-INST: bfmop4s za1.h, z12.h, z24.h
110112
// CHECK-ENCODING: [0x99,0x01,0x28,0x81]
111-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
113+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
112114
// CHECK-UNKNOWN: 81280199 <unknown>
113115

114116
bfmop4s za1.h, z14.h, z30.h // 10000001-00101110-00000001-11011001
115117
// CHECK-INST: bfmop4s za1.h, z14.h, z30.h
116118
// CHECK-ENCODING: [0xd9,0x01,0x2e,0x81]
117-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
119+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
118120
// CHECK-UNKNOWN: 812e01d9 <unknown>
119121

120122
// Single and multiple vectors
121123

122124
bfmop4s za0.h, z0.h, {z16.h-z17.h} // 10000001-00110000-00000000-00011000
123125
// CHECK-INST: bfmop4s za0.h, z0.h, { z16.h, z17.h }
124126
// CHECK-ENCODING: [0x18,0x00,0x30,0x81]
125-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
127+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
126128
// CHECK-UNKNOWN: 81300018 <unknown>
127129

128130
bfmop4s za1.h, z12.h, {z24.h-z25.h} // 10000001-00111000-00000001-10011001
129131
// CHECK-INST: bfmop4s za1.h, z12.h, { z24.h, z25.h }
130132
// CHECK-ENCODING: [0x99,0x01,0x38,0x81]
131-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
133+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
132134
// CHECK-UNKNOWN: 81380199 <unknown>
133135

134136
bfmop4s za1.h, z14.h, {z30.h-z31.h} // 10000001-00111110-00000001-11011001
135137
// CHECK-INST: bfmop4s za1.h, z14.h, { z30.h, z31.h }
136138
// CHECK-ENCODING: [0xd9,0x01,0x3e,0x81]
137-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
139+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
138140
// CHECK-UNKNOWN: 813e01d9 <unknown>
139141

140142
// Multiple and single vectors
141143

142144
bfmop4s za0.h, {z0.h-z1.h}, z16.h // 10000001-00100000-00000010-00011000
143145
// CHECK-INST: bfmop4s za0.h, { z0.h, z1.h }, z16.h
144146
// CHECK-ENCODING: [0x18,0x02,0x20,0x81]
145-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
147+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
146148
// CHECK-UNKNOWN: 81200218 <unknown>
147149

148150
bfmop4s za1.h, {z12.h-z13.h}, z24.h // 10000001-00101000-00000011-10011001
149151
// CHECK-INST: bfmop4s za1.h, { z12.h, z13.h }, z24.h
150152
// CHECK-ENCODING: [0x99,0x03,0x28,0x81]
151-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
153+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
152154
// CHECK-UNKNOWN: 81280399 <unknown>
153155

154156
bfmop4s za1.h, {z14.h-z15.h}, z30.h // 10000001-00101110-00000011-11011001
155157
// CHECK-INST: bfmop4s za1.h, { z14.h, z15.h }, z30.h
156158
// CHECK-ENCODING: [0xd9,0x03,0x2e,0x81]
157-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
159+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
158160
// CHECK-UNKNOWN: 812e03d9 <unknown>
159161

160162
// Multiple vectors
161163

162164
bfmop4s za0.h, {z0.h-z1.h}, {z16.h-z17.h} // 10000001-00110000-00000010-00011000
163165
// CHECK-INST: bfmop4s za0.h, { z0.h, z1.h }, { z16.h, z17.h }
164166
// CHECK-ENCODING: [0x18,0x02,0x30,0x81]
165-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
167+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
166168
// CHECK-UNKNOWN: 81300218 <unknown>
167169

168170
bfmop4s za1.h, {z12.h-z13.h}, {z24.h-z25.h} // 10000001-00111000-00000011-10011001
169171
// CHECK-INST: bfmop4s za1.h, { z12.h, z13.h }, { z24.h, z25.h }
170172
// CHECK-ENCODING: [0x99,0x03,0x38,0x81]
171-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
173+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
172174
// CHECK-UNKNOWN: 81380399 <unknown>
173175

174176
bfmop4s za1.h, {z14.h-z15.h}, {z30.h-z31.h} // 10000001-00111110-00000011-11011001
175177
// CHECK-INST: bfmop4s za1.h, { z14.h, z15.h }, { z30.h, z31.h }
176178
// CHECK-ENCODING: [0xd9,0x03,0x3e,0x81]
177-
// CHECK-ERROR: instruction requires: sme2p2 sme-b16b16
179+
// CHECK-ERROR: instruction requires: sme2p2 or sme-mop4 sme-b16b16
178180
// CHECK-UNKNOWN: 813e03d9 <unknown>

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