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[SelectionDAG] Remove redundant vector checks (NFC)
It turns out that the function already exits early if N1 is not a constant or is a vector, so simplify.
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2 files changed

+9
-15
lines changed

2 files changed

+9
-15
lines changed

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5179,8 +5179,6 @@ MachineInstr *CombinerHelper::buildUDivUsingMul(MachineInstr &MI) {
51795179
LLT ShiftAmtTy = getTargetLowering().getPreferredShiftAmountTy(Ty);
51805180
LLT ScalarShiftAmtTy = ShiftAmtTy.getScalarType();
51815181

5182-
unsigned KnownLeadingZeros =
5183-
KB ? KB->getKnownBits(LHS).countMinLeadingZeros() : 0;
51845182
auto &MIB = Builder;
51855183

51865184
bool UseSRL = false;
@@ -5226,6 +5224,8 @@ MachineInstr *CombinerHelper::buildUDivUsingMul(MachineInstr &MI) {
52265224
// TODO: Use undef values for divisor of 1.
52275225
if (!Divisor.isOne()) {
52285226

5227+
unsigned KnownLeadingZeros =
5228+
KB ? KB->getKnownBits(LHS).countMinLeadingZeros() : 0;
52295229
// UnsignedDivisionByConstantInfo doesn't work correctly if leading zeros
52305230
// in the dividend exceeds the leading zeros for the divisor.
52315231
UnsignedDivisionByConstantInfo magics =

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 7 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -6481,18 +6481,6 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
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SDValue N0 = N->getOperand(0);
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SDValue N1 = N->getOperand(1);
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6484-
// Try to use leading zeros of the dividend to reduce the multiplier and
6485-
// avoid expensive fixups.
6486-
// TODO: Support vectors.
6487-
unsigned LeadingZeros = 0;
6488-
if (!VT.isVector() && isa<ConstantSDNode>(N1)) {
6489-
assert(!isOneConstant(N1) && "Unexpected divisor");
6490-
LeadingZeros = DAG.computeKnownBits(N0).countMinLeadingZeros();
6491-
// UnsignedDivisionByConstantInfo doesn't work correctly if leading zeros in
6492-
// the dividend exceeds the leading zeros for the divisor.
6493-
LeadingZeros = std::min(LeadingZeros, N1->getAsAPIntVal().countl_zero());
6494-
}
6495-
64966484
bool UseNPQ = false, UsePreShift = false, UsePostShift = false;
64976485
SmallVector<SDValue, 16> PreShifts, PostShifts, MagicFactors, NPQFactors;
64986486

@@ -6509,8 +6497,14 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
65096497
PreShift = PostShift = DAG.getUNDEF(ShSVT);
65106498
MagicFactor = NPQFactor = DAG.getUNDEF(SVT);
65116499
} else {
6500+
// Try to use leading zeros of the dividend to reduce the multiplier and
6501+
// avoid expensive fixups.
6502+
unsigned KnownLeadingZeros =
6503+
DAG.computeKnownBits(N0).countMinLeadingZeros();
6504+
65126505
UnsignedDivisionByConstantInfo magics =
6513-
UnsignedDivisionByConstantInfo::get(Divisor, LeadingZeros);
6506+
UnsignedDivisionByConstantInfo::get(
6507+
Divisor, std::min(KnownLeadingZeros, Divisor.countl_zero()));
65146508

65156509
MagicFactor = DAG.getConstant(magics.Magic, dl, SVT);
65166510

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