|
7 | 7 | //===----------------------------------------------------------------------===//
|
8 | 8 | ///
|
9 | 9 | /// \file
|
10 |
| -/// This is a target description file for DXIL operation. |
| 10 | +/// This is a target description file for DXIL operations. |
11 | 11 | ///
|
12 | 12 | //===----------------------------------------------------------------------===//
|
13 | 13 |
|
14 | 14 | include "llvm/IR/Intrinsics.td"
|
15 | 15 |
|
16 |
| -class dxil_class<string _name> { |
17 |
| - string name = _name; |
| 16 | +// Abstract representation of the class a DXIL Operation belongs to. |
| 17 | +class DxilOpClass<string name> { |
| 18 | + string Name = name; |
18 | 19 | }
|
19 |
| -class dxil_category<string _name> { |
20 |
| - string name = _name; |
| 20 | + |
| 21 | +// Abstract representation of the category a DXIL Operation belongs to |
| 22 | +class DxilOpCategory<string name> { |
| 23 | + string Name = name; |
21 | 24 | }
|
22 | 25 |
|
23 |
| -def Unary : dxil_class<"Unary">; |
24 |
| -def Binary : dxil_class<"Binary">; |
25 |
| -def FlattenedThreadIdInGroupClass : dxil_class<"FlattenedThreadIdInGroup">; |
26 |
| -def ThreadIdInGroupClass : dxil_class<"ThreadIdInGroup">; |
27 |
| -def ThreadIdClass : dxil_class<"ThreadId">; |
28 |
| -def GroupIdClass : dxil_class<"GroupId">; |
29 |
| - |
30 |
| -def binary_uint : dxil_category<"Binary uint">; |
31 |
| -def unary_float : dxil_category<"Unary float">; |
32 |
| -def ComputeID : dxil_category<"Compute/Mesh/Amplification shader">; |
33 |
| - |
34 |
| - |
35 |
| -// The parameter description for a DXIL instruction |
36 |
| -class dxil_param<int _pos, string type, string _name, string _doc, |
37 |
| - bit _is_const = 0, string _enum_name = "", |
38 |
| - int _max_value = 0> { |
39 |
| - int pos = _pos; // position in parameter list |
40 |
| - string llvm_type = type; // llvm type name, $o for overload, $r for resource |
41 |
| - // type, $cb for legacy cbuffer, $u4 for u4 struct |
42 |
| - string name = _name; // short, unique name |
43 |
| - string doc = _doc; // the documentation description of this parameter |
44 |
| - bit is_const = |
45 |
| - _is_const; // whether this argument requires a constant value in the IR |
46 |
| - string enum_name = _enum_name; // the name of the enum type if applicable |
47 |
| - int max_value = |
48 |
| - _max_value; // the maximum value for this parameter if applicable |
| 26 | +def UnaryClass : DxilOpClass<"Unary">; |
| 27 | +def BinaryClass : DxilOpClass<"Binary">; |
| 28 | +def FlattenedThreadIdInGroupClass : DxilOpClass<"FlattenedThreadIdInGroup">; |
| 29 | +def ThreadIdInGroupClass : DxilOpClass<"ThreadIdInGroup">; |
| 30 | +def ThreadIdClass : DxilOpClass<"ThreadId">; |
| 31 | +def GroupIdClass : DxilOpClass<"GroupId">; |
| 32 | + |
| 33 | +def BinaryUintCategory : DxilOpCategory<"Binary uint">; |
| 34 | +def UnaryFloatCategory : DxilOpCategory<"Unary float">; |
| 35 | +def ComputeIDCategory : DxilOpCategory<"Compute/Mesh/Amplification shader">; |
| 36 | + |
| 37 | +// The parameter description for a DXIL operation |
| 38 | +class DxilOpParameter<int pos, string type, string name, string doc, |
| 39 | + bit isConstant = 0, string enumName = "", |
| 40 | + int maxValue = 0> { |
| 41 | + int Pos = pos; // Position in parameter list |
| 42 | + string LLVMType = type; // LLVM type name, $o for overload, $r for resource |
| 43 | + // type, $cb for legacy cbuffer, $u4 for u4 struct |
| 44 | + string Name = name; // Short, unique parameter name |
| 45 | + string Doc = doc; // Description of this parameter |
| 46 | + bit IsConstant = isConstant; // Whether this parameter requires a constant value in the IR |
| 47 | + string EnumName = enumName; // Name of the enum type, if applicable |
| 48 | + int MaxValue = maxValue; // Maximum value for this parameter, if applicable |
49 | 49 | }
|
50 | 50 |
|
51 |
| -// A representation for a DXIL instruction |
52 |
| -class dxil_inst<string _name> { |
53 |
| - string name = _name; // short, unique name |
54 |
| - |
55 |
| - string dxil_op = ""; // name of DXIL operation |
56 |
| - int dxil_opid = 0; // ID of DXIL operation |
57 |
| - dxil_class op_class; // name of the opcode class |
58 |
| - dxil_category category; // classification for this instruction |
59 |
| - string doc = ""; // the documentation description of this instruction |
60 |
| - list<dxil_param> ops = []; // the operands that this instruction takes |
61 |
| - string oload_types = ""; // overload types if applicable |
62 |
| - string fn_attr = ""; // attribute shorthands: rn=does not access |
63 |
| - // memory,ro=only reads from memory, |
64 |
| - bit is_deriv = 0; // whether this is some kind of derivative |
65 |
| - bit is_gradient = 0; // whether this requires a gradient calculation |
66 |
| - bit is_feedback = 0; // whether this is a sampler feedback op |
67 |
| - bit is_wave = 0; // whether this requires in-wave, cross-lane functionality |
68 |
| - bit requires_uniform_inputs = 0; // whether this operation requires that all |
69 |
| - // of its inputs are uniform across the wave |
70 |
| - // Group dxil operation for stats. |
71 |
| - // Like how many atomic/float/uint/int/... instructions used in the program. |
72 |
| - list<string> stats_group = []; |
| 51 | +// A representation for a DXIL operation |
| 52 | +class DxilOperationDesc<string name> { |
| 53 | + // TODO : Appears redundant. OpName should serve the same purpose |
| 54 | + string Name = name; // short, unique name |
| 55 | + |
| 56 | + string OpName = ""; // Name of DXIL operation |
| 57 | + int OpCode = 0; // Unique non-negative integer associated with the operation |
| 58 | + DxilOpClass OpClass; // Class of the operation |
| 59 | + DxilOpCategory OpCategory; // Category of the operation |
| 60 | + string Doc = ""; // Description of the operation |
| 61 | + list<DxilOpParameter> Params = []; // Parameter list of the operation |
| 62 | + string OverloadTypes = ""; // Overload types, if applicable |
| 63 | + string Attributes = ""; // Attribute shorthands: rn=does not access |
| 64 | + // memory,ro=only reads from memory, |
| 65 | + bit IsDerivative = 0; // Whether this is some kind of derivative |
| 66 | + bit IsGradient = 0; // Whether this requires a gradient calculation |
| 67 | + bit IsFeedback = 0; // Whether this is a sampler feedback operation |
| 68 | + bit IsWave = 0; // Whether this requires in-wave, cross-lane functionality |
| 69 | + bit NeedsUniformInputs = 0; // Whether this operation requires that all |
| 70 | + // of its inputs are uniform across the wave |
| 71 | + // Group DXIL operation for stats - e.g., to accumulate the number of atomic/float/uint/int/... |
| 72 | + // operations used in the program. |
| 73 | + list<string> StatsGroup = []; |
73 | 74 | }
|
74 | 75 |
|
75 |
| -class dxil_op<string name, int code_id, dxil_class code_class, dxil_category op_category, string _doc, |
76 |
| - string _oload_types, string _fn_attr, list<dxil_param> op_params, |
77 |
| - list<string> _stats_group = []> : dxil_inst<name> { |
78 |
| - let dxil_op = name; |
79 |
| - let dxil_opid = code_id; |
80 |
| - let doc = _doc; |
81 |
| - let ops = op_params; |
82 |
| - let op_class = code_class; |
83 |
| - let category = op_category; |
84 |
| - let oload_types = _oload_types; |
85 |
| - let fn_attr = _fn_attr; |
86 |
| - let stats_group = _stats_group; |
| 76 | +class DxilOperation<string name, int opCode, DxilOpClass opClass, DxilOpCategory opCategory, string doc, |
| 77 | + string oloadTypes, string attrs, list<DxilOpParameter> params, |
| 78 | + list<string> statsGroup = []> : DxilOperationDesc<name> { |
| 79 | + let OpName = name; |
| 80 | + let OpCode = opCode; |
| 81 | + let Doc = doc; |
| 82 | + let Params = params; |
| 83 | + let OpClass = opClass; |
| 84 | + let OpCategory = opCategory; |
| 85 | + let OverloadTypes = oloadTypes; |
| 86 | + let Attributes = attrs; |
| 87 | + let StatsGroup = statsGroup; |
87 | 88 | }
|
88 | 89 |
|
89 |
| -// The intrinsic which map directly to this dxil op. |
90 |
| -class dxil_map_intrinsic<Intrinsic llvm_intrinsic_> { Intrinsic llvm_intrinsic = llvm_intrinsic_; } |
| 90 | +// LLVM intrinsic that DXIL operation maps to. |
| 91 | +class LLVMIntrinsic<Intrinsic llvm_intrinsic_> { Intrinsic llvm_intrinsic = llvm_intrinsic_; } |
91 | 92 |
|
92 |
| -def Sin : dxil_op<"Sin", 13, Unary, unary_float, "returns sine(theta) for theta in radians.", |
| 93 | +def Sin : DxilOperation<"Sin", 13, UnaryClass, UnaryFloatCategory, "returns sine(theta) for theta in radians.", |
93 | 94 | "half;float;", "rn",
|
94 | 95 | [
|
95 |
| - dxil_param<0, "$o", "", "operation result">, |
96 |
| - dxil_param<1, "i32", "opcode", "DXIL opcode">, |
97 |
| - dxil_param<2, "$o", "value", "input value"> |
| 96 | + DxilOpParameter<0, "$o", "", "operation result">, |
| 97 | + DxilOpParameter<1, "i32", "opcode", "DXIL opcode">, |
| 98 | + DxilOpParameter<2, "$o", "value", "input value"> |
98 | 99 | ],
|
99 | 100 | ["floats"]>,
|
100 |
| - dxil_map_intrinsic<int_sin>; |
| 101 | + LLVMIntrinsic<int_sin>; |
101 | 102 |
|
102 |
| -def UMax :dxil_op< "UMax", 39, Binary, binary_uint, "unsigned integer maximum. UMax(a,b) = a > b ? a : b", |
| 103 | +def UMax : DxilOperation< "UMax", 39, BinaryClass, BinaryUintCategory, "unsigned integer maximum. UMax(a,b) = a > b ? a : b", |
103 | 104 | "i16;i32;i64;", "rn",
|
104 | 105 | [
|
105 |
| - dxil_param<0, "$o", "", "operation result">, |
106 |
| - dxil_param<1, "i32", "opcode", "DXIL opcode">, |
107 |
| - dxil_param<2, "$o", "a", "input value">, |
108 |
| - dxil_param<3, "$o", "b", "input value"> |
| 106 | + DxilOpParameter<0, "$o", "", "operation result">, |
| 107 | + DxilOpParameter<1, "i32", "opcode", "DXIL opcode">, |
| 108 | + DxilOpParameter<2, "$o", "a", "input value">, |
| 109 | + DxilOpParameter<3, "$o", "b", "input value"> |
109 | 110 | ],
|
110 | 111 | ["uints"]>,
|
111 |
| - dxil_map_intrinsic<int_umax>; |
| 112 | + LLVMIntrinsic<int_umax>; |
112 | 113 |
|
113 |
| -def ThreadId :dxil_op< "ThreadId", 93, ThreadIdClass, ComputeID, "reads the thread ID", "i32;", "rn", |
| 114 | +def ThreadId : DxilOperation< "ThreadId", 93, ThreadIdClass, ComputeIDCategory, "reads the thread ID", "i32;", "rn", |
114 | 115 | [
|
115 |
| - dxil_param<0, "i32", "", "thread ID component">, |
116 |
| - dxil_param<1, "i32", "opcode", "DXIL opcode">, |
117 |
| - dxil_param<2, "i32", "component", "component to read (x,y,z)"> |
| 116 | + DxilOpParameter<0, "i32", "", "thread ID component">, |
| 117 | + DxilOpParameter<1, "i32", "opcode", "DXIL opcode">, |
| 118 | + DxilOpParameter<2, "i32", "component", "component to read (x,y,z)"> |
118 | 119 | ]>,
|
119 |
| - dxil_map_intrinsic<int_dx_thread_id>; |
| 120 | + LLVMIntrinsic<int_dx_thread_id>; |
120 | 121 |
|
121 |
| -def GroupId :dxil_op< "GroupId", 94, GroupIdClass, ComputeID, "reads the group ID (SV_GroupID)", "i32;", "rn", |
| 122 | +def GroupId : DxilOperation< "GroupId", 94, GroupIdClass, ComputeIDCategory, "reads the group ID (SV_GroupID)", "i32;", "rn", |
122 | 123 | [
|
123 |
| - dxil_param<0, "i32", "", "group ID component">, |
124 |
| - dxil_param<1, "i32", "opcode", "DXIL opcode">, |
125 |
| - dxil_param<2, "i32", "component", "component to read"> |
| 124 | + DxilOpParameter<0, "i32", "", "group ID component">, |
| 125 | + DxilOpParameter<1, "i32", "opcode", "DXIL opcode">, |
| 126 | + DxilOpParameter<2, "i32", "component", "component to read"> |
126 | 127 | ]>,
|
127 |
| - dxil_map_intrinsic<int_dx_group_id>; |
| 128 | + LLVMIntrinsic<int_dx_group_id>; |
128 | 129 |
|
129 |
| -def ThreadIdInGroup :dxil_op< "ThreadIdInGroup", 95, ThreadIdInGroupClass, ComputeID, |
| 130 | +def ThreadIdInGroup : DxilOperation< "ThreadIdInGroup", 95, ThreadIdInGroupClass, ComputeIDCategory, |
130 | 131 | "reads the thread ID within the group (SV_GroupThreadID)", "i32;", "rn",
|
131 | 132 | [
|
132 |
| - dxil_param<0, "i32", "", "thread ID in group component">, |
133 |
| - dxil_param<1, "i32", "opcode", "DXIL opcode">, |
134 |
| - dxil_param<2, "i32", "component", "component to read (x,y,z)"> |
| 133 | + DxilOpParameter<0, "i32", "", "thread ID in group component">, |
| 134 | + DxilOpParameter<1, "i32", "opcode", "DXIL opcode">, |
| 135 | + DxilOpParameter<2, "i32", "component", "component to read (x,y,z)"> |
135 | 136 | ]>,
|
136 |
| - dxil_map_intrinsic<int_dx_thread_id_in_group>; |
| 137 | + LLVMIntrinsic<int_dx_thread_id_in_group>; |
137 | 138 |
|
138 |
| -def FlattenedThreadIdInGroup :dxil_op< "FlattenedThreadIdInGroup", 96, FlattenedThreadIdInGroupClass, ComputeID, |
| 139 | +def FlattenedThreadIdInGroup : DxilOperation< "FlattenedThreadIdInGroup", 96, FlattenedThreadIdInGroupClass, ComputeIDCategory, |
139 | 140 | "provides a flattened index for a given thread within a given group (SV_GroupIndex)", "i32;", "rn",
|
140 | 141 | [
|
141 |
| - dxil_param<0, "i32", "", "result">, |
142 |
| - dxil_param<1, "i32", "opcode", "DXIL opcode"> |
| 142 | + DxilOpParameter<0, "i32", "", "result">, |
| 143 | + DxilOpParameter<1, "i32", "opcode", "DXIL opcode"> |
143 | 144 | ]>,
|
144 |
| - dxil_map_intrinsic<int_dx_flattened_thread_id_in_group>; |
| 145 | + LLVMIntrinsic<int_dx_flattened_thread_id_in_group>; |
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