Update table gen and use one test case in _alias.s

Author: mariusz-sikora-at-amd

llvm/include/llvm/IR/IntrinsicsAMDGPU.td

@@ -2726,8 +2726,8 @@ class IntDSBVHStackRtn<LLVMType vdst, LLVMType data1> :
     [ImmArg<ArgIndex<3>>, IntrWillReturn, IntrNoCallback, IntrNoFree]
   >;
 
-def int_amdgcn_ds_bvh_stack_rtn : IntDSBVHStackRtn</* vdst  = */ llvm_i32_ty,
-                                                   /* data1 = */ llvm_v4i32_ty>;
+def int_amdgcn_ds_bvh_stack_rtn : IntDSBVHStackRtn<vdst  = llvm_i32_ty,
+                                                   data1 = llvm_v4i32_ty>;
 
 def int_amdgcn_s_wait_event_export_ready :
   ClangBuiltin<"__builtin_amdgcn_s_wait_event_export_ready">,
@@ -2804,14 +2804,14 @@ def int_amdgcn_wmma_bf16_16x16x16_bf16 : AMDGPUWmmaIntrinsicOPSEL<llvm_anyint_ty
 // GFX12 Intrinsics
 //===----------------------------------------------------------------------===//
 
-def int_amdgcn_ds_bvh_stack_push4_pop1_rtn : IntDSBVHStackRtn</* vdst  = */ llvm_i32_ty,
-                                                              /* data1 = */ llvm_v4i32_ty>;
+def int_amdgcn_ds_bvh_stack_push4_pop1_rtn : IntDSBVHStackRtn<vdst  = llvm_i32_ty,
+                                                              data1 = llvm_v4i32_ty>;
 
-def int_amdgcn_ds_bvh_stack_push8_pop1_rtn : IntDSBVHStackRtn</* vdst  = */ llvm_i32_ty,
-                                                              /* data1 = */ llvm_v8i32_ty>;
+def int_amdgcn_ds_bvh_stack_push8_pop1_rtn : IntDSBVHStackRtn<vdst  = llvm_i32_ty,
+                                                              data1 = llvm_v8i32_ty>;
 
-def int_amdgcn_ds_bvh_stack_push8_pop2_rtn : IntDSBVHStackRtn</* vdst  = */ llvm_i64_ty,
-                                                              /* data1 = */ llvm_v8i32_ty>;
+def int_amdgcn_ds_bvh_stack_push8_pop2_rtn : IntDSBVHStackRtn<vdst  = llvm_i64_ty,
+                                                              data1 = llvm_v8i32_ty>;
 
 // llvm.amdgcn.permlane16.var <old> <src0> <src1> <fi> <bound_control>
 def int_amdgcn_permlane16_var : ClangBuiltin<"__builtin_amdgcn_permlane16_var">,

llvm/test/MC/AMDGPU/gfx12_asm_ds_alias.s

@@ -38,6 +38,3 @@ ds_subrev_rtn_u64 v[5:6], v1, v[2:3]
 
 ds_bvh_stack_rtn_b32 v1, v0, v1, v[2:5]
 // GFX12: ds_bvh_stack_push4_pop1_rtn_b32 v1, v0, v1, v[2:5] ; encoding: [0x00,0x00,0x80,0xdb,0x00,0x01,0x02,0x01]
-
-ds_bvh_stack_rtn_b32 v1, v0, v1, v[2:5] offset:1
-// GFX12: ds_bvh_stack_push4_pop1_rtn_b32 v1, v0, v1, v[2:5] offset:1 ; encoding: [0x01,0x00,0x80,0xdb,0x00,0x01,0x02,0x01]