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[VPlan] Compute cost for binary op VPInstruction with underlying values. (#125434)
As exposed by #125094, we are missing cost computation for some binary VPInstructions we created based on original IR instructions. Their cost should be considered. PR: #125434
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llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Lines changed: 21 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -720,14 +720,34 @@ Value *VPInstruction::generate(VPTransformState &State) {
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InstructionCost VPInstruction::computeCost(ElementCount VF,
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VPCostContext &Ctx) const {
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if (Instruction::isBinaryOp(getOpcode())) {
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if (!getUnderlyingValue()) {
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// TODO: Compute cost for VPInstructions without underlying values once
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// the legacy cost model has been retired.
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return 0;
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}
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assert(!doesGeneratePerAllLanes() &&
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"Should only generate a vector value or single scalar, not scalars "
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"for all lanes.");
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Type *ResTy = Ctx.Types.inferScalarType(this);
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if (!vputils::onlyFirstLaneUsed(this))
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ResTy = toVectorTy(ResTy, VF);
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return Ctx.TTI.getArithmeticInstrCost(getOpcode(), ResTy, Ctx.CostKind);
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}
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switch (getOpcode()) {
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case VPInstruction::AnyOf: {
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auto *VecTy = toVectorTy(Ctx.Types.inferScalarType(this), VF);
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return Ctx.TTI.getArithmeticReductionCost(
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Instruction::Or, cast<VectorType>(VecTy), std::nullopt, Ctx.CostKind);
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}
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default:
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// TODO: Fill out other opcodes!
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// TODO: Compute cost other VPInstructions once the legacy cost model has
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// been retired.
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assert(!getUnderlyingValue() &&
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"unexpected VPInstruction witht underlying value");
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return 0;
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}
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}
Lines changed: 74 additions & 0 deletions
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@@ -0,0 +1,74 @@
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --filter "Cost of"
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; RUN: opt -S -passes=loop-vectorize -mcpu=skylake-avx512 -mtriple=x86_64-apple-macosx -debug -disable-output -S %s 2>&1 | FileCheck %s
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; REQUIRES: asserts
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
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define void @wide_or_replaced_with_add_vpinstruction(ptr %src, ptr noalias %dst) {
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; CHECK-LABEL: 'wide_or_replaced_with_add_vpinstruction'
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; CHECK: Cost of 1 for VF 2: induction instruction %iv.next = add nuw nsw i64 %iv, 1
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; CHECK: Cost of 0 for VF 2: induction instruction %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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; CHECK: Cost of 1 for VF 2: exit condition instruction %exitcond = icmp eq i64 %iv.next, 32
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; CHECK: Cost of 0 for VF 2: EMIT vp<%3> = CANONICAL-INDUCTION ir<0>, vp<%index.next>
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; CHECK: Cost of 0 for VF 2: ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<%0>
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; CHECK: Cost of 0 for VF 2: vp<%4> = SCALAR-STEPS vp<%3>, ir<1>
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; CHECK: Cost of 0 for VF 2: CLONE ir<%g.src> = getelementptr inbounds ir<%src>, vp<%4>
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; CHECK: Cost of 0 for VF 2: vp<%5> = vector-pointer ir<%g.src>
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; CHECK: Cost of 1 for VF 2: WIDEN ir<%l> = load vp<%5>
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; CHECK: Cost of 1 for VF 2: WIDEN ir<%iv.4> = add ir<%iv>, ir<4>
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; CHECK: Cost of 1 for VF 2: WIDEN ir<%c> = icmp ule ir<%l>, ir<128>
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; CHECK: Cost of 1 for VF 2: EMIT ir<%or> = add ir<%iv.4>, ir<1>
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; CHECK: Cost of 0 for VF 2: CLONE ir<%g.dst> = getelementptr ir<%dst>, ir<%or>
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; CHECK: Cost of 0 for VF 2: vp<%6> = vector-pointer ir<%g.dst>
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; CHECK: Cost of 1 for VF 2: WIDEN store vp<%6>, ir<%iv.4>, ir<%c>
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; CHECK: Cost of 0 for VF 2: EMIT vp<%index.next> = add nuw vp<%3>, vp<%1>
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; CHECK: Cost of 0 for VF 2: EMIT branch-on-count vp<%index.next>, vp<%2>
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; CHECK: Cost of 0 for VF 2: vector loop backedge
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; CHECK: Cost of 1 for VF 4: induction instruction %iv.next = add nuw nsw i64 %iv, 1
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; CHECK: Cost of 0 for VF 4: induction instruction %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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; CHECK: Cost of 1 for VF 4: exit condition instruction %exitcond = icmp eq i64 %iv.next, 32
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; CHECK: Cost of 0 for VF 4: EMIT vp<%3> = CANONICAL-INDUCTION ir<0>, vp<%index.next>
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; CHECK: Cost of 0 for VF 4: ir<%iv> = WIDEN-INDUCTION ir<0>, ir<1>, vp<%0>
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; CHECK: Cost of 0 for VF 4: vp<%4> = SCALAR-STEPS vp<%3>, ir<1>
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; CHECK: Cost of 0 for VF 4: CLONE ir<%g.src> = getelementptr inbounds ir<%src>, vp<%4>
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; CHECK: Cost of 0 for VF 4: vp<%5> = vector-pointer ir<%g.src>
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; CHECK: Cost of 1 for VF 4: WIDEN ir<%l> = load vp<%5>
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; CHECK: Cost of 1 for VF 4: WIDEN ir<%iv.4> = add ir<%iv>, ir<4>
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; CHECK: Cost of 1 for VF 4: WIDEN ir<%c> = icmp ule ir<%l>, ir<128>
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; CHECK: Cost of 1 for VF 4: EMIT ir<%or> = add ir<%iv.4>, ir<1>
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; CHECK: Cost of 0 for VF 4: CLONE ir<%g.dst> = getelementptr ir<%dst>, ir<%or>
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; CHECK: Cost of 0 for VF 4: vp<%6> = vector-pointer ir<%g.dst>
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; CHECK: Cost of 1 for VF 4: WIDEN store vp<%6>, ir<%iv.4>, ir<%c>
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; CHECK: Cost of 0 for VF 4: EMIT vp<%index.next> = add nuw vp<%3>, vp<%1>
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; CHECK: Cost of 0 for VF 4: EMIT branch-on-count vp<%index.next>, vp<%2>
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; CHECK: Cost of 0 for VF 4: vector loop backedge
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; CHECK: Cost of 1 for VF 4: induction instruction %iv.next = add nuw nsw i64 %iv, 1
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; CHECK: Cost of 0 for VF 4: induction instruction %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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; CHECK: Cost of 1 for VF 4: exit condition instruction %exitcond = icmp eq i64 %iv.next, 32
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%g.src = getelementptr inbounds i64, ptr %src, i64 %iv
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%l = load i64, ptr %g.src
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%iv.4 = add nuw nsw i64 %iv, 4
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%c = icmp ule i64 %l, 128
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br i1 %c, label %loop.then, label %loop.latch
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loop.then:
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%or = or disjoint i64 %iv.4, 1
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%g.dst = getelementptr inbounds i64, ptr %dst, i64 %or
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store i64 %iv.4, ptr %g.dst, align 4
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br label %loop.latch
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loop.latch:
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 32
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br i1 %exitcond, label %exit, label %loop.header
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exit:
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ret void
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}

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