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JonPsson1JonPsson1
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[SystemZ] Eliminate call sequence instructions early. (#77812)
On SystemZ, the outgoing argument area which is big enough for all calls in the function is created once during the prolog, as opposed to adjusting the stack around each call. The call-sequence instructions are therefore not really useful any more than to compute the maximum call frame size, which has so far been done by PEI, but can just as well be done at an earlier point. This patch removes the mapping of the CallFrameSetupOpcode and CallFrameDestroyOpcode and instead computes the MaxCallFrameSize directly after instruction selection and then removes the ADJCALLSTACK pseudos. This removes the confusing pseudos and also avoids the problem of having to keep the call frame size accurate when creating new MBBs. This fixes #76618 which exposed the need to maintain the call frame size when splitting blocks (which was not done).
1 parent 1607e82 commit 16b7cc6

14 files changed

+45
-50
lines changed

‎llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -66,22 +66,6 @@ SystemZFrameLowering::create(const SystemZSubtarget &STI) {
6666
return std::make_unique<SystemZELFFrameLowering>();
6767
}
6868

69-
MachineBasicBlock::iterator SystemZFrameLowering::eliminateCallFramePseudoInstr(
70-
MachineFunction &MF, MachineBasicBlock &MBB,
71-
MachineBasicBlock::iterator MI) const {
72-
switch (MI->getOpcode()) {
73-
case SystemZ::ADJCALLSTACKDOWN:
74-
case SystemZ::ADJCALLSTACKUP:
75-
assert(hasReservedCallFrame(MF) &&
76-
"ADJSTACKDOWN and ADJSTACKUP should be no-ops");
77-
return MBB.erase(MI);
78-
break;
79-
80-
default:
81-
llvm_unreachable("Unexpected call frame instruction");
82-
}
83-
}
84-
8569
namespace {
8670
struct SZFrameSortingObj {
8771
bool IsValid = false; // True if we care about this Object.

‎llvm/lib/Target/SystemZ/SystemZFrameLowering.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -41,9 +41,6 @@ class SystemZFrameLowering : public TargetFrameLowering {
4141
}
4242

4343
bool hasReservedCallFrame(const MachineFunction &MF) const override;
44-
MachineBasicBlock::iterator
45-
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
46-
MachineBasicBlock::iterator MI) const override;
4744
};
4845

4946
class SystemZELFFrameLowering : public SystemZFrameLowering {

‎llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8173,6 +8173,26 @@ static void createPHIsForSelects(SmallVector<MachineInstr*, 8> &Selects,
81738173
MF->getProperties().reset(MachineFunctionProperties::Property::NoPHIs);
81748174
}
81758175

8176+
MachineBasicBlock *
8177+
SystemZTargetLowering::emitAdjCallStack(MachineInstr &MI,
8178+
MachineBasicBlock *BB) const {
8179+
MachineFunction &MF = *BB->getParent();
8180+
MachineFrameInfo &MFI = MF.getFrameInfo();
8181+
auto *TFL = Subtarget.getFrameLowering<SystemZFrameLowering>();
8182+
assert(TFL->hasReservedCallFrame(MF) &&
8183+
"ADJSTACKDOWN and ADJSTACKUP should be no-ops");
8184+
// Get the MaxCallFrameSize value and erase MI since it serves no further
8185+
// purpose as the call frame is statically reserved in the prolog. Set
8186+
// AdjustsStack as MI is *not* mapped as a frame instruction.
8187+
uint32_t NumBytes = MI.getOperand(0).getImm();
8188+
if (NumBytes > MFI.getMaxCallFrameSize())
8189+
MFI.setMaxCallFrameSize(NumBytes);
8190+
MFI.setAdjustsStack(true);
8191+
8192+
MI.eraseFromParent();
8193+
return BB;
8194+
}
8195+
81768196
// Implement EmitInstrWithCustomInserter for pseudo Select* instruction MI.
81778197
MachineBasicBlock *
81788198
SystemZTargetLowering::emitSelect(MachineInstr &MI,
@@ -9376,6 +9396,10 @@ getBackchainAddress(SDValue SP, SelectionDAG &DAG) const {
93769396
MachineBasicBlock *SystemZTargetLowering::EmitInstrWithCustomInserter(
93779397
MachineInstr &MI, MachineBasicBlock *MBB) const {
93789398
switch (MI.getOpcode()) {
9399+
case SystemZ::ADJCALLSTACKDOWN:
9400+
case SystemZ::ADJCALLSTACKUP:
9401+
return emitAdjCallStack(MI, MBB);
9402+
93799403
case SystemZ::Select32:
93809404
case SystemZ::Select64:
93819405
case SystemZ::Select128:

‎llvm/lib/Target/SystemZ/SystemZISelLowering.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -760,6 +760,8 @@ class SystemZTargetLowering : public TargetLowering {
760760
MachineBasicBlock *Target) const;
761761

762762
// Implement EmitInstrWithCustomInserter for individual operation types.
763+
MachineBasicBlock *emitAdjCallStack(MachineInstr &MI,
764+
MachineBasicBlock *BB) const;
763765
MachineBasicBlock *emitSelect(MachineInstr &MI, MachineBasicBlock *BB) const;
764766
MachineBasicBlock *emitCondStore(MachineInstr &MI, MachineBasicBlock *BB,
765767
unsigned StoreOpcode, unsigned STOCOpcode,

‎llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,7 @@ static uint64_t allOnes(unsigned int Count) {
5959
void SystemZInstrInfo::anchor() {}
6060

6161
SystemZInstrInfo::SystemZInstrInfo(SystemZSubtarget &sti)
62-
: SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
62+
: SystemZGenInstrInfo(-1, -1),
6363
RI(sti.getSpecialRegisters()->getReturnFunctionAddressRegister()),
6464
STI(sti) {}
6565

‎llvm/lib/Target/SystemZ/SystemZInstrInfo.td

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,9 @@ def IsTargetELF : Predicate<"Subtarget->isTargetELF()">;
1313
// Stack allocation
1414
//===----------------------------------------------------------------------===//
1515

16-
// The callseq_start node requires the hasSideEffects flag, even though these
17-
// instructions are noops on SystemZ.
18-
let hasNoSchedulingInfo = 1, hasSideEffects = 1 in {
16+
// These pseudos carry values needed to compute the MaxcallFrameSize of the
17+
// function. The callseq_start node requires the hasSideEffects flag.
18+
let usesCustomInserter = 1, hasNoSchedulingInfo = 1, hasSideEffects = 1 in {
1919
def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
2020
[(callseq_start timm:$amt1, timm:$amt2)]>;
2121
def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),

‎llvm/test/CodeGen/SystemZ/call-zos-vararg.ll

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,13 +88,15 @@ entry:
8888
ret i64 %retval
8989
}
9090

91+
;; TODO: The extra COPY after LGDR is unnecessary (machine-scheduler introduces the overlap).
9192
; CHECK-LABEL: call_vararg_both0:
9293
; CHECK: stmg 6, 7, 1872(4)
9394
; CHECK-NEXT: aghi 4, -192
9495
; CHECK-NEXT: lg 6, 40(5)
9596
; CHECK-NEXT: lg 5, 32(5)
97+
; CHECK-NEXT: lgdr 0, 0
9698
; CHECK-NEXT: lgr 2, 1
97-
; CHECK-NEXT: lgdr 1, 0
99+
; CHECK-NEXT: lgr 1, 0
98100
; CHECK-NEXT: basr 7, 6
99101
; CHECK-NEXT: bcr 0, 0
100102
; CHECK-NEXT: lg 7, 2072(4)

‎llvm/test/CodeGen/SystemZ/cond-move-04.mir

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -65,12 +65,10 @@ body: |
6565
CHIMux %3, 0, implicit-def $cc
6666
%0 = LOCRMux undef %0, %5, 14, 6, implicit $cc
6767
%0 = LOCRMux %0, %2, 14, 6, implicit killed $cc
68-
ADJCALLSTACKDOWN 0, 0
6968
%7 = LGFR %0
7069
$r3d = LGHI 0
7170
$r4d = COPY %7
7271
CallBRASL @foo, undef $r2d, killed $r3d, killed $r4d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def dead $r2d
73-
ADJCALLSTACKUP 0, 0
7472
J %bb.1
7573
7674
...

‎llvm/test/CodeGen/SystemZ/cond-move-08.mir

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -155,9 +155,7 @@ body: |
155155
J %bb.4
156156
157157
bb.4.bb33:
158-
ADJCALLSTACKDOWN 0, 0
159158
CallBRASL @fun, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
160-
ADJCALLSTACKUP 0, 0
161159
STRL %4, @globvar :: (store (s32) into @globvar)
162160
CLFIMux undef %23:grx32bit, 1, implicit-def $cc
163161
%25:grx32bit = LHIMux 0

‎llvm/test/CodeGen/SystemZ/cond-move-regalloc-hints-02.mir

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,11 +45,9 @@ body: |
4545
%11:gr32bit = SELRMux %8, %9:grx32bit, 14, 6, implicit killed $cc
4646
CHIMux %6, 2, implicit-def $cc
4747
%0:gr32bit = SELRMux %11, %5, 14, 8, implicit killed $cc
48-
ADJCALLSTACKDOWN 0, 0
4948
%10:gr64bit = LGFR %0
5049
$r2d = COPY %10
5150
CallBRASL @foo, killed $r2d, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
52-
ADJCALLSTACKUP 0, 0
5351
J %bb.1
5452
5553
...

‎llvm/test/CodeGen/SystemZ/cond-move-regalloc-hints.mir

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -200,18 +200,12 @@ body: |
200200
201201
%32:gr64bit = COPY $r3d
202202
%0:gr64bit = COPY $r2d
203-
ADJCALLSTACKDOWN 0, 0
204203
CallBRASL @sre_malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
205204
%1:addr64bit = COPY $r2d
206-
ADJCALLSTACKUP 0, 0
207-
ADJCALLSTACKDOWN 0, 0
208205
CallBRASL @sre_malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit-def $r2d
209206
%2:addr64bit = COPY $r2d
210-
ADJCALLSTACKUP 0, 0
211207
%3:gr32bit = AHIMuxK %0.subreg_l32, -1, implicit-def dead $cc
212-
ADJCALLSTACKDOWN 0, 0
213208
CallBRASL @malloc, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc
214-
ADJCALLSTACKUP 0, 0
215209
%55:gr32bit = AHIMuxK %0.subreg_l32, 3, implicit-def dead $cc
216210
%56:addr64bit = LGHI 0
217211
%57:gr64bit = COPY %0

‎llvm/test/CodeGen/SystemZ/frame-28.mir

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -179,9 +179,7 @@ body: |
179179
VST64 renamable $f16d, %stack.0, 0, $noreg
180180
VST64 renamable $f16d, %stack.0, 0, $noreg
181181
VST64 renamable $f16d, %stack.1, 0, $noreg
182-
ADJCALLSTACKDOWN 0, 0
183182
CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
184-
ADJCALLSTACKUP 0, 0
185183
$f17d = IMPLICIT_DEF
186184
VST64 renamable $f17d, %stack.1, 0, $noreg
187185
Return

‎llvm/test/CodeGen/SystemZ/swifterror.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,8 @@ entry:
3030
define float @caller(ptr %error_ref) {
3131
; CHECK-LABEL: caller:
3232
; Make a copy of error_ref because r2 is getting clobbered
33-
; CHECK: lgr %r[[REG1:[0-9]+]], %r2
34-
; CHECK: lghi %r9, 0
33+
; CHECK-DAG: lgr %r[[REG1:[0-9]+]], %r2
34+
; CHECK-DAG: lghi %r9, 0
3535
; CHECK: brasl %r14, foo
3636
; CHECK: %r2, %r9
3737
; CHECK: jlh
@@ -197,7 +197,7 @@ define void @foo_sret(ptr sret(%struct.S) %agg.result, i32 %val1, ptr swifterror
197197
; CHECK-LABEL: foo_sret:
198198
; CHECK-DAG: lgr %r[[REG1:[0-9]+]], %r2
199199
; CHECK-DAG: lr %r[[REG2:[0-9]+]], %r3
200-
; CHECK: lghi %r2, 16
200+
; CHECK-DAG: lghi %r2, 16
201201
; CHECK: brasl %r14, malloc
202202
; CHECK: mvi 8(%r2), 1
203203
; CHECK: st %r[[REG2]], 4(%r[[REG1]])
@@ -280,7 +280,7 @@ define float @caller_with_multiple_swifterror_values(ptr %error_ref, ptr %error_
280280
; CHECK-DAG: lgr %r[[REG1:[0-9]+]], %r2
281281
; CHECK-DAG: lgr %r[[REG2:[0-9]+]], %r3
282282
; The first swifterror value:
283-
; CHECK: lghi %r9, 0
283+
; CHECK-DAG: lghi %r9, 0
284284
; CHECK: brasl %r14, foo
285285
; CHECK: ltgr %r2, %r9
286286
; CHECK: jlh

‎llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1649,8 +1649,8 @@ define <2 x double> @constrained_vector_powi_v2f64() #0 {
16491649
; S390X-NEXT: brasl %r14, __powidf2@PLT
16501650
; S390X-NEXT: larl %r1, .LCPI36_1
16511651
; S390X-NEXT: ld %f1, 0(%r1)
1652-
; S390X-NEXT: ldr %f8, %f0
16531652
; S390X-NEXT: lghi %r2, 3
1653+
; S390X-NEXT: ldr %f8, %f0
16541654
; S390X-NEXT: ldr %f0, %f1
16551655
; S390X-NEXT: brasl %r14, __powidf2@PLT
16561656
; S390X-NEXT: ldr %f2, %f8
@@ -1707,14 +1707,14 @@ define <3 x float> @constrained_vector_powi_v3f32() #0 {
17071707
; S390X-NEXT: brasl %r14, __powisf2@PLT
17081708
; S390X-NEXT: larl %r1, .LCPI37_1
17091709
; S390X-NEXT: le %f1, 0(%r1)
1710-
; S390X-NEXT: ler %f8, %f0
17111710
; S390X-NEXT: lghi %r2, 3
1711+
; S390X-NEXT: ler %f8, %f0
17121712
; S390X-NEXT: ler %f0, %f1
17131713
; S390X-NEXT: brasl %r14, __powisf2@PLT
17141714
; S390X-NEXT: larl %r1, .LCPI37_2
17151715
; S390X-NEXT: le %f1, 0(%r1)
1716-
; S390X-NEXT: ler %f9, %f0
17171716
; S390X-NEXT: lghi %r2, 3
1717+
; S390X-NEXT: ler %f9, %f0
17181718
; S390X-NEXT: ler %f0, %f1
17191719
; S390X-NEXT: brasl %r14, __powisf2@PLT
17201720
; S390X-NEXT: ler %f2, %f9
@@ -1784,14 +1784,14 @@ define void @constrained_vector_powi_v3f64(ptr %a) #0 {
17841784
; S390X-NEXT: brasl %r14, __powidf2@PLT
17851785
; S390X-NEXT: larl %r1, .LCPI38_1
17861786
; S390X-NEXT: ld %f1, 0(%r1)
1787-
; S390X-NEXT: ldr %f8, %f0
17881787
; S390X-NEXT: lghi %r2, 3
1788+
; S390X-NEXT: ldr %f8, %f0
17891789
; S390X-NEXT: ldr %f0, %f1
17901790
; S390X-NEXT: brasl %r14, __powidf2@PLT
17911791
; S390X-NEXT: larl %r1, .LCPI38_2
17921792
; S390X-NEXT: ld %f1, 0(%r1)
1793-
; S390X-NEXT: ldr %f9, %f0
17941793
; S390X-NEXT: lghi %r2, 3
1794+
; S390X-NEXT: ldr %f9, %f0
17951795
; S390X-NEXT: ldr %f0, %f1
17961796
; S390X-NEXT: brasl %r14, __powidf2@PLT
17971797
; S390X-NEXT: std %f0, 16(%r13)
@@ -1865,20 +1865,20 @@ define <4 x double> @constrained_vector_powi_v4f64() #0 {
18651865
; S390X-NEXT: brasl %r14, __powidf2@PLT
18661866
; S390X-NEXT: larl %r1, .LCPI39_1
18671867
; S390X-NEXT: ld %f1, 0(%r1)
1868-
; S390X-NEXT: ldr %f8, %f0
18691868
; S390X-NEXT: lghi %r2, 3
1869+
; S390X-NEXT: ldr %f8, %f0
18701870
; S390X-NEXT: ldr %f0, %f1
18711871
; S390X-NEXT: brasl %r14, __powidf2@PLT
18721872
; S390X-NEXT: larl %r1, .LCPI39_2
18731873
; S390X-NEXT: ld %f1, 0(%r1)
1874-
; S390X-NEXT: ldr %f9, %f0
18751874
; S390X-NEXT: lghi %r2, 3
1875+
; S390X-NEXT: ldr %f9, %f0
18761876
; S390X-NEXT: ldr %f0, %f1
18771877
; S390X-NEXT: brasl %r14, __powidf2@PLT
18781878
; S390X-NEXT: larl %r1, .LCPI39_3
18791879
; S390X-NEXT: ld %f1, 0(%r1)
1880-
; S390X-NEXT: ldr %f10, %f0
18811880
; S390X-NEXT: lghi %r2, 3
1881+
; S390X-NEXT: ldr %f10, %f0
18821882
; S390X-NEXT: ldr %f0, %f1
18831883
; S390X-NEXT: brasl %r14, __powidf2@PLT
18841884
; S390X-NEXT: ldr %f2, %f10

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