File tree Expand file tree Collapse file tree 3 files changed +24
-7
lines changed Expand file tree Collapse file tree 3 files changed +24
-7
lines changed Original file line number Diff line number Diff line change 12
12
#include " src/__support/common.h"
13
13
#include " src/__support/macros/config.h"
14
14
#include " src/__support/macros/properties/architectures.h"
15
+ #include " src/__support/macros/properties/cpu_features.h"
15
16
16
- #if !defined(LIBC_TARGET_ARCH_IS_AARCH64 )
17
+ #if !defined(LIBC_TARGET_ARCH_IS_ANY_ARM )
17
18
#error "Invalid include"
18
19
#endif
19
20
22
23
namespace LIBC_NAMESPACE_DECL {
23
24
namespace fputil {
24
25
26
+ #ifdef LIBC_TARGET_CPU_HAS_ARM_FPU_FLOAT
25
27
template <> LIBC_INLINE float sqrt<float >(float x) {
26
28
float y;
27
- __asm__ __volatile__ (" fsqrt %s0, %s1\n\t " : " =w" (y) : " w" (x));
29
+ asm (" fsqrt %s0, %s1\n\t " : " =w" (y) : " w" (x));
28
30
return y;
29
31
}
32
+ #endif // LIBC_TARGET_CPU_HAS_ARM_FPU_FLOAT
30
33
34
+ #ifdef LIBC_TARGET_CPU_HAS_ARM_FPU_DOUBLE
31
35
template <> LIBC_INLINE double sqrt<double >(double x) {
32
36
double y;
33
- __asm__ __volatile__ (" fsqrt %d0, %d1\n\t " : " =w" (y) : " w" (x));
37
+ asm (" fsqrt %d0, %d1\n\t " : " =w" (y) : " w" (x));
34
38
return y;
35
39
}
40
+ #endif // LIBC_TARGET_CPU_HAS_ARM_FPU_DOUBLE
36
41
37
42
} // namespace fputil
38
43
} // namespace LIBC_NAMESPACE_DECL
Original file line number Diff line number Diff line change 14
14
15
15
#if defined(LIBC_TARGET_ARCH_IS_X86_64) && defined(LIBC_TARGET_CPU_HAS_SSE2)
16
16
#include " x86_64/sqrt.h"
17
- #elif defined(LIBC_TARGET_ARCH_IS_AARCH64 )
17
+ #elif defined(LIBC_TARGET_ARCH_IS_ANY_ARM )
18
18
#include " aarch64/sqrt.h"
19
19
#elif defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
20
20
#include " riscv/sqrt.h"
Original file line number Diff line number Diff line change 42
42
#define LIBC_TARGET_CPU_HAS_AVX512BW
43
43
#endif
44
44
45
+ #if defined(__ARM_FP)
46
+ #if (__ARM_FP & 0x2)
47
+ #define LIBC_TARGET_CPU_HAS_ARM_FPU_HALF
48
+ #endif // LIBC_TARGET_CPU_HAS_ARM_FPU_HALF
49
+ #if (__ARM_FP & 0x4)
50
+ #define LIBC_TARGET_CPU_HAS_ARM_FPU_FLOAT
51
+ #endif // LIBC_TARGET_CPU_HAS_ARM_FPU_FLOAT
52
+ #if (__ARM_FP & 0x8)
53
+ #define LIBC_TARGET_CPU_HAS_ARM_FPU_DOUBLE
54
+ #endif // LIBC_TARGET_CPU_HAS_ARM_FPU_DOUBLE
55
+ #endif // __ARM_FP
56
+
45
57
#if defined(__ARM_FEATURE_FMA) || (defined(__AVX2__) && defined(__FMA__)) || \
46
58
defined (__NVPTX__) || defined(__AMDGPU__) || defined(__LIBC_RISCV_USE_FMA)
47
59
#define LIBC_TARGET_CPU_HAS_FMA
48
60
// Provide a more fine-grained control of FMA instruction for ARM targets.
49
61
#if defined(__ARM_FP)
50
- #if (__ARM_FP & 0x2 )
62
+ #if defined(LIBC_TARGET_CPU_HAS_ARM_FPU_HALF )
51
63
#define LIBC_TARGET_CPU_HAS_FMA_HALF
52
64
#endif // LIBC_TARGET_CPU_HAS_FMA_HALF
53
- #if (__ARM_FP & 0x4 )
65
+ #if defined(LIBC_TARGET_CPU_HAS_ARM_FPU_FLOAT )
54
66
#define LIBC_TARGET_CPU_HAS_FMA_FLOAT
55
67
#endif // LIBC_TARGET_CPU_HAS_FMA_FLOAT
56
- #if (__ARM_FP & 0x8 )
68
+ #if defined(LIBC_TARGET_CPU_HAS_ARM_FPU_DOUBLE )
57
69
#define LIBC_TARGET_CPU_HAS_FMA_DOUBLE
58
70
#endif // LIBC_TARGET_CPU_HAS_FMA_DOUBLE
59
71
#else
You can’t perform that action at this time.
0 commit comments