partial mapping VRB64 is for LMUL=1, MF2, MF4, and MF8

jiahanxie353 · jiahanxie353 · commit 177d866b6557 · 2024-01-31T14:30:31.000-05:00
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
@@ -60,7 +60,7 @@ const RegisterBankInfo::ValueMapping ValueMappings[] = {
     {&PartMappings[PMI_FPRB64], 1},
     {&PartMappings[PMI_FPRB64], 1},
     {&PartMappings[PMI_FPRB64], 1},
-    // Maximum 3 VR LMUL=1 operands.
+    // Maximum 3 VR LMUL={1, MF2, MF4, MF8} operands.
     {&PartMappings[PMI_VRB64], 1},
     {&PartMappings[PMI_VRB64], 1},
     {&PartMappings[PMI_VRB64], 1},
