|
65 | 65 | ret void
|
66 | 66 | }
|
67 | 67 |
|
68 |
| -define void @int_iv_commuted(i64 %base, i64 %end) { |
69 |
| -; CHECK-LABEL: define void @int_iv_commuted( |
| 68 | +define void @int_iv_commuted_add(i64 %base, i64 %end) { |
| 69 | +; CHECK-LABEL: define void @int_iv_commuted_add( |
70 | 70 | ; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
|
71 | 71 | ; CHECK-NEXT: entry:
|
72 | 72 | ; CHECK-NEXT: [[BASE2:%.*]] = mul i64 [[BASE]], 42
|
|
99 | 99 | ret void
|
100 | 100 | }
|
101 | 101 |
|
| 102 | +define void @int_iv_commuted_phi1(i64 %base, i64 %end) { |
| 103 | +; CHECK-LABEL: define void @int_iv_commuted_phi1( |
| 104 | +; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) { |
| 105 | +; CHECK-NEXT: entry: |
| 106 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 107 | +; CHECK: loop: |
| 108 | +; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[BASE]], [[ENTRY:%.*]] ], [ [[IV2_NEXT:%.*]], [[LOOP]] ] |
| 109 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 110 | +; CHECK-NEXT: call void @use.i64(i64 [[IV2]]) |
| 111 | +; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4 |
| 112 | +; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[IV_NEXT]], [[BASE]] |
| 113 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]] |
| 114 | +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]] |
| 115 | +; CHECK: exit: |
| 116 | +; CHECK-NEXT: ret void |
| 117 | +; |
| 118 | +entry: |
| 119 | + br label %loop |
| 120 | + |
| 121 | +loop: |
| 122 | + %iv2 = phi i64 [ %base, %entry ], [ %iv2.next, %loop ] |
| 123 | + %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] |
| 124 | + call void @use.i64(i64 %iv2) |
| 125 | + %iv.next = add nuw nsw i64 %iv, 4 |
| 126 | + %iv2.next = add i64 %iv.next, %base |
| 127 | + %cmp = icmp eq i64 %iv.next, %end |
| 128 | + br i1 %cmp, label %exit, label %loop |
| 129 | + |
| 130 | +exit: |
| 131 | + ret void |
| 132 | +} |
| 133 | + |
| 134 | +define void @int_iv_commuted_phi2(i64 %base, i64 %end) { |
| 135 | +; CHECK-LABEL: define void @int_iv_commuted_phi2( |
| 136 | +; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) { |
| 137 | +; CHECK-NEXT: entry: |
| 138 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 139 | +; CHECK: loop: |
| 140 | +; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ] |
| 141 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ] |
| 142 | +; CHECK-NEXT: call void @use.i64(i64 [[IV2]]) |
| 143 | +; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4 |
| 144 | +; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[IV_NEXT]], [[BASE]] |
| 145 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]] |
| 146 | +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]] |
| 147 | +; CHECK: exit: |
| 148 | +; CHECK-NEXT: ret void |
| 149 | +; |
| 150 | +entry: |
| 151 | + br label %loop |
| 152 | + |
| 153 | +loop: |
| 154 | + %iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ] |
| 155 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 156 | + call void @use.i64(i64 %iv2) |
| 157 | + %iv.next = add nuw nsw i64 %iv, 4 |
| 158 | + %iv2.next = add i64 %iv.next, %base |
| 159 | + %cmp = icmp eq i64 %iv.next, %end |
| 160 | + br i1 %cmp, label %exit, label %loop |
| 161 | + |
| 162 | +exit: |
| 163 | + ret void |
| 164 | +} |
| 165 | + |
102 | 166 | define void @int_iv_vector(<2 x i64> %base) {
|
103 | 167 | ; CHECK-LABEL: define void @int_iv_vector(
|
104 | 168 | ; CHECK-SAME: <2 x i64> [[BASE:%.*]]) {
|
@@ -229,6 +293,38 @@ exit:
|
229 | 293 | ret void
|
230 | 294 | }
|
231 | 295 |
|
| 296 | +define void @ptr_iv_non_i8_type(ptr %base, i64 %end) { |
| 297 | +; CHECK-LABEL: define void @ptr_iv_non_i8_type( |
| 298 | +; CHECK-SAME: ptr [[BASE:%.*]], i64 [[END:%.*]]) { |
| 299 | +; CHECK-NEXT: entry: |
| 300 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 301 | +; CHECK: loop: |
| 302 | +; CHECK-NEXT: [[IV_PTR:%.*]] = phi ptr [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ] |
| 303 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ] |
| 304 | +; CHECK-NEXT: call void @use.p0(ptr [[IV_PTR]]) |
| 305 | +; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4 |
| 306 | +; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr i32, ptr [[BASE]], i64 [[IV_NEXT]] |
| 307 | +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]] |
| 308 | +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]] |
| 309 | +; CHECK: exit: |
| 310 | +; CHECK-NEXT: ret void |
| 311 | +; |
| 312 | +entry: |
| 313 | + br label %loop |
| 314 | + |
| 315 | +loop: |
| 316 | + %iv.ptr = phi ptr [ %iv.ptr.next, %loop ], [ %base, %entry ] |
| 317 | + %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] |
| 318 | + call void @use.p0(ptr %iv.ptr) |
| 319 | + %iv.next = add nuw nsw i64 %iv, 4 |
| 320 | + %iv.ptr.next = getelementptr i32, ptr %base, i64 %iv.next |
| 321 | + %cmp = icmp eq i64 %iv.next, %end |
| 322 | + br i1 %cmp, label %exit, label %loop |
| 323 | + |
| 324 | +exit: |
| 325 | + ret void |
| 326 | +} |
| 327 | + |
232 | 328 | define void @ptr_iv_vector(<2 x ptr> %base, i64 %end) {
|
233 | 329 | ; CHECK-LABEL: define void @ptr_iv_vector(
|
234 | 330 | ; CHECK-SAME: <2 x ptr> [[BASE:%.*]], i64 [[END:%.*]]) {
|
|
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