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[X86] VEX/EVEX prefix doesn't work for inline assembly.
For now, we lost the encoding information if we using inline assembly. The encoding for the inline assembly will keep default even if we add the vex/evex prefix. Differential Revision: https://reviews.llvm.org/D90009
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4 files changed

+66
-13
lines changed

4 files changed

+66
-13
lines changed
Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -S -o - | FileCheck %s -check-prefix CHECK
2+
3+
// This test is to check if the prefix in inline assembly is correctly
4+
// preserved.
5+
6+
void check_inline_prefix(void) {
7+
__asm__ (
8+
// CHECK: vcvtps2pd %xmm0, %xmm1
9+
// CHECK: {vex} vcvtps2pd %xmm0, %xmm1
10+
// CHECK: {vex2} vcvtps2pd %xmm0, %xmm1
11+
// CHECK: {vex3} vcvtps2pd %xmm0, %xmm1
12+
// CHECK: {evex} vcvtps2pd %xmm0, %xmm1
13+
// CHECK: movl $1, (%rax)
14+
// CHECK: {disp8} movl $1, (%rax)
15+
// CHECK: {disp32} movl $1, (%rax)
16+
"vcvtps2pd %xmm0, %xmm1\n\t"
17+
"{vex} vcvtps2pd %xmm0, %xmm1\n\t"
18+
"{vex2} vcvtps2pd %xmm0, %xmm1\n\t"
19+
"{vex3} vcvtps2pd %xmm0, %xmm1\n\t"
20+
"{evex} vcvtps2pd %xmm0, %xmm1\n\t"
21+
"movl $1, (%rax)\n\t"
22+
"{disp8} movl $1, (%rax)\n\t"
23+
"{disp32} movl $1, (%rax)\n\t"
24+
);
25+
}

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,7 @@ class X86AsmParser : public MCTargetAsmParser {
8383
enum VEXEncoding {
8484
VEXEncoding_Default,
8585
VEXEncoding_VEX,
86+
VEXEncoding_VEX2,
8687
VEXEncoding_VEX3,
8788
VEXEncoding_EVEX,
8889
};
@@ -2818,8 +2819,10 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
28182819
return Error(Parser.getTok().getLoc(), "Expected '}'");
28192820
Parser.Lex(); // Eat curly.
28202821

2821-
if (Prefix == "vex" || Prefix == "vex2")
2822+
if (Prefix == "vex")
28222823
ForcedVEXEncoding = VEXEncoding_VEX;
2824+
else if (Prefix == "vex2")
2825+
ForcedVEXEncoding = VEXEncoding_VEX2;
28232826
else if (Prefix == "vex3")
28242827
ForcedVEXEncoding = VEXEncoding_VEX3;
28252828
else if (Prefix == "evex")
@@ -3837,6 +3840,7 @@ unsigned X86AsmParser::checkTargetMatchPredicate(MCInst &Inst) {
38373840
return Match_Unsupported;
38383841

38393842
if ((ForcedVEXEncoding == VEXEncoding_VEX ||
3843+
ForcedVEXEncoding == VEXEncoding_VEX2 ||
38403844
ForcedVEXEncoding == VEXEncoding_VEX3) &&
38413845
(MCID.TSFlags & X86II::EncodingMask) != X86II::VEX)
38423846
return Match_Unsupported;
@@ -3879,10 +3883,16 @@ bool X86AsmParser::MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode,
38793883

38803884
MCInst Inst;
38813885

3882-
// If VEX3 encoding is forced, we need to pass the USE_VEX3 flag to the
3883-
// encoder.
3884-
if (ForcedVEXEncoding == VEXEncoding_VEX3)
3886+
// If VEX/EVEX encoding is forced, we need to pass the USE_* flag to the
3887+
// encoder and printer.
3888+
if (ForcedVEXEncoding == VEXEncoding_VEX)
3889+
Prefixes |= X86::IP_USE_VEX;
3890+
else if (ForcedVEXEncoding == VEXEncoding_VEX2)
3891+
Prefixes |= X86::IP_USE_VEX2;
3892+
else if (ForcedVEXEncoding == VEXEncoding_VEX3)
38853893
Prefixes |= X86::IP_USE_VEX3;
3894+
else if (ForcedVEXEncoding == VEXEncoding_EVEX)
3895+
Prefixes |= X86::IP_USE_EVEX;
38863896

38873897
// Set encoded flags for {disp8} and {disp32}.
38883898
if (ForcedDispEncoding == DispEncoding_Disp8)

llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h

Lines changed: 12 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -55,15 +55,18 @@ namespace X86 {
5555
/// The constants to describe instr prefixes if there are
5656
enum IPREFIXES {
5757
IP_NO_PREFIX = 0,
58-
IP_HAS_OP_SIZE = 1,
59-
IP_HAS_AD_SIZE = 2,
60-
IP_HAS_REPEAT_NE = 4,
61-
IP_HAS_REPEAT = 8,
62-
IP_HAS_LOCK = 16,
63-
IP_HAS_NOTRACK = 32,
64-
IP_USE_VEX3 = 64,
65-
IP_USE_DISP8 = 128,
66-
IP_USE_DISP32 = 256,
58+
IP_HAS_OP_SIZE = 1U << 0,
59+
IP_HAS_AD_SIZE = 1U << 1,
60+
IP_HAS_REPEAT_NE = 1U << 2,
61+
IP_HAS_REPEAT = 1U << 3,
62+
IP_HAS_LOCK = 1U << 4,
63+
IP_HAS_NOTRACK = 1U << 5,
64+
IP_USE_VEX = 1U << 6,
65+
IP_USE_VEX2 = 1U << 7,
66+
IP_USE_VEX3 = 1U << 8,
67+
IP_USE_EVEX = 1U << 9,
68+
IP_USE_DISP8 = 1U << 10,
69+
IP_USE_DISP32 = 1U << 11,
6770
};
6871

6972
enum OperandType : unsigned {

llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -346,6 +346,21 @@ void X86InstPrinterCommon::printInstFlags(const MCInst *MI, raw_ostream &O) {
346346
O << "\trepne\t";
347347
else if (Flags & X86::IP_HAS_REPEAT)
348348
O << "\trep\t";
349+
350+
// These all require a pseudo prefix
351+
if (Flags & X86::IP_USE_VEX)
352+
O << "\t{vex}";
353+
else if (Flags & X86::IP_USE_VEX2)
354+
O << "\t{vex2}";
355+
else if (Flags & X86::IP_USE_VEX3)
356+
O << "\t{vex3}";
357+
else if (Flags & X86::IP_USE_EVEX)
358+
O << "\t{evex}";
359+
360+
if (Flags & X86::IP_USE_DISP8)
361+
O << "\t{disp8}";
362+
else if (Flags & X86::IP_USE_DISP32)
363+
O << "\t{disp32}";
349364
}
350365

351366
void X86InstPrinterCommon::printVKPair(const MCInst *MI, unsigned OpNo,

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