fixup! [RISCV][MachineCombiner] Add reassociation optimizations for RVV instructions

Author: mshockwave

llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

@@ -1662,10 +1662,6 @@ bool RISCVInstrInfo::isVectorAssociativeAndCommutative(const MachineInstr &Inst,
   OPCODE_LMUL_MASK_CASE(PseudoVADD_VV):
   OPCODE_LMUL_CASE(PseudoVMUL_VV):
   OPCODE_LMUL_MASK_CASE(PseudoVMUL_VV):
-  OPCODE_LMUL_CASE(PseudoVMULH_VV):
-  OPCODE_LMUL_MASK_CASE(PseudoVMULH_VV):
-  OPCODE_LMUL_CASE(PseudoVMULHU_VV):
-  OPCODE_LMUL_MASK_CASE(PseudoVMULHU_VV):
     return true;
   }
   // clang-format on
@@ -1740,7 +1736,7 @@ bool RISCVInstrInfo::areRVVInstsReassociable(const MachineInstr &MI1,
   return true;
 }
 
-// Most of our RVV pseudo has passthru operand, so the real operands
+// Most of our RVV pseudos have passthru operand, so the real operands
 // start from index = 2.
 bool RISCVInstrInfo::hasReassociableVectorSibling(const MachineInstr &Inst,
                                                   bool &Commuted) const {
@@ -1792,7 +1788,7 @@ void RISCVInstrInfo::getReassociateOperandIndices(
   TargetInstrInfo::getReassociateOperandIndices(Root, Pattern, OperandIndices);
   if (isVectorAssociativeAndCommutative(Root) ||
       isVectorAssociativeAndCommutative(Root, /*Invert=*/true)) {
-    // Skip the passthrough operand, so add all indices by one.
+    // Skip the passthrough operand, so increment all indices by one.
     for (unsigned I = 0; I < 5; ++I)
       ++OperandIndices[I];
   }