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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -S --passes=slp-vectorizer -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s |
| 3 | + |
| 4 | +define void @test() { |
| 5 | +; CHECK-LABEL: define void @test() { |
| 6 | +; CHECK-NEXT: [[BB:.*]]: |
| 7 | +; CHECK-NEXT: br label %[[BB6:.*]] |
| 8 | +; CHECK: [[BB1:.*]]: |
| 9 | +; CHECK-NEXT: br label %[[BB2:.*]] |
| 10 | +; CHECK: [[BB2]]: |
| 11 | +; CHECK-NEXT: [[TMP0:%.*]] = phi <4 x i32> [ poison, %[[BB1]] ], [ [[TMP5:%.*]], %[[BB6]] ] |
| 12 | +; CHECK-NEXT: ret void |
| 13 | +; CHECK: [[BB6]]: |
| 14 | +; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x i32> [ zeroinitializer, %[[BB]] ], [ [[TMP8:%.*]], %[[BB6]] ] |
| 15 | +; CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.vector.insert.v4i32.v2i32(<4 x i32> <i32 0, i32 0, i32 poison, i32 poison>, <2 x i32> [[TMP1]], i64 2) |
| 16 | +; CHECK-NEXT: [[TMP3:%.*]] = ashr <4 x i32> zeroinitializer, [[TMP2]] |
| 17 | +; CHECK-NEXT: [[TMP4:%.*]] = mul <4 x i32> zeroinitializer, [[TMP2]] |
| 18 | +; CHECK-NEXT: [[TMP5]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> <i32 0, i32 5, i32 6, i32 7> |
| 19 | +; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <2 x i32> <i32 2, i32 poison> |
| 20 | +; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> <i32 poison, i32 0>, <2 x i32> <i32 0, i32 3> |
| 21 | +; CHECK-NEXT: [[TMP8]] = mul <2 x i32> zeroinitializer, [[TMP7]] |
| 22 | +; CHECK-NEXT: br i1 false, label %[[BB2]], label %[[BB6]] |
| 23 | +; |
| 24 | +bb: |
| 25 | + br label %bb6 |
| 26 | + |
| 27 | +bb1: |
| 28 | + %ashr = ashr i32 0, 0 |
| 29 | + br label %bb2 |
| 30 | + |
| 31 | +bb2: |
| 32 | + %phi = phi i32 [ %ashr, %bb1 ], [ %ashr9, %bb6 ] |
| 33 | + %phi3 = phi i32 [ 0, %bb1 ], [ %mul10, %bb6 ] |
| 34 | + %phi4 = phi i32 [ 0, %bb1 ], [ %mul11, %bb6 ] |
| 35 | + %phi5 = phi i32 [ 0, %bb1 ], [ %mul, %bb6 ] |
| 36 | + ret void |
| 37 | + |
| 38 | +bb6: |
| 39 | + %phi7 = phi i32 [ 0, %bb ], [ %mul11, %bb6 ] |
| 40 | + %phi8 = phi i32 [ 0, %bb ], [ %mul10, %bb6 ] |
| 41 | + %mul = mul i32 0, %phi8 |
| 42 | + %ashr9 = ashr i32 0, 0 |
| 43 | + %mul10 = mul i32 0, 0 |
| 44 | + %mul11 = mul i32 %phi7, 0 |
| 45 | + br i1 false, label %bb2, label %bb6 |
| 46 | +} |
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